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| author | Alexandre Torgue <alexandre.torgue@st.com> | 2017-07-20 16:17:00 +0200 |
|---|---|---|
| committer | Alexandre Torgue <alexandre.torgue@st.com> | 2017-07-26 17:00:14 +0200 |
| commit | 978edf15252f2648fdd7ca1f9a822e9e2ae95152 (patch) | |
| tree | b03a26fd90a7804f43f68808aafa6d0bb58e7612 /arch/arm/boot/dts/stm32h743.dtsi | |
| parent | 411afd34f338078cb68a1ed21764e66d886f56eb (diff) | |
ARM: dts: stm32: reorder stm32h743 nodes
Reorder nodes to keep coherency with others platforms (stm32f4/stm32f7).
Nodes are ordered following base address.
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Diffstat (limited to 'arch/arm/boot/dts/stm32h743.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/stm32h743.dtsi | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/arch/arm/boot/dts/stm32h743.dtsi b/arch/arm/boot/dts/stm32h743.dtsi index 36a99db0a3b4..343bf4a0fb0b 100644 --- a/arch/arm/boot/dts/stm32h743.dtsi +++ b/arch/arm/boot/dts/stm32h743.dtsi @@ -59,13 +59,11 @@ }; soc { - usart1: serial@40011000 { - compatible = "st,stm32f7-usart", "st,stm32f7-uart"; - reg = <0x40011000 0x400>; - interrupts = <37>; - status = "disabled"; + timer5: timer@40000c00 { + compatible = "st,stm32-timer"; + reg = <0x40000c00 0x400>; + interrupts = <50>; clocks = <&timer_clk>; - }; usart2: serial@40004400 { @@ -76,11 +74,13 @@ clocks = <&timer_clk>; }; - timer5: timer@40000c00 { - compatible = "st,stm32-timer"; - reg = <0x40000c00 0x400>; - interrupts = <50>; + usart1: serial@40011000 { + compatible = "st,stm32f7-usart", "st,stm32f7-uart"; + reg = <0x40011000 0x400>; + interrupts = <37>; + status = "disabled"; clocks = <&timer_clk>; + }; }; }; |