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authorPierre-Yves MORDRET <pierre-yves.mordret@st.com>2018-04-23 11:48:00 +0200
committerAlexandre Torgue <alexandre.torgue@st.com>2018-05-04 09:45:43 +0200
commit4d58a474a57bb93846c44f87ed46a3b36e62b912 (patch)
tree3f3b16ecc2cf7a1731c98ad7cabed24907085488 /arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
parentd126e86f403f6187ac4be7b5f883c54173330b4e (diff)
ARM: dts: stm32: Add I2Cs pins used on STM32MP157C
This patch adds pins groups for I2C1,2,4 & 5 Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Diffstat (limited to 'arch/arm/boot/dts/stm32mp157-pinctrl.dtsi')
-rw-r--r--arch/arm/boot/dts/stm32mp157-pinctrl.dtsi40
1 files changed, 40 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
index 5ee5b3bcfe33..6201fe7898e4 100644
--- a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
@@ -146,6 +146,36 @@
gpio-ranges = <&pinctrl 0 160 8>;
};
+ i2c1_pins_a: i2c1-0 {
+ pins {
+ pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */
+ <STM32_PINMUX('F', 15, AF5)>; /* I2C1_SDA */
+ bias-disable;
+ drive-open-drain;
+ slew-rate = <0>;
+ };
+ };
+
+ i2c2_pins_a: i2c2-0 {
+ pins {
+ pinmux = <STM32_PINMUX('H', 4, AF4)>, /* I2C2_SCL */
+ <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
+ bias-disable;
+ drive-open-drain;
+ slew-rate = <0>;
+ };
+ };
+
+ i2c5_pins_a: i2c5-0 {
+ pins {
+ pinmux = <STM32_PINMUX('A', 11, AF4)>, /* I2C5_SCL */
+ <STM32_PINMUX('A', 12, AF4)>; /* I2C5_SDA */
+ bias-disable;
+ drive-open-drain;
+ slew-rate = <0>;
+ };
+ };
+
pwm2_pins_a: pwm2-0 {
pins {
pinmux = <STM32_PINMUX('A', 3, AF1)>; /* TIM2_CH4 */
@@ -207,6 +237,16 @@
ngpios = <8>;
gpio-ranges = <&pinctrl_z 0 400 8>;
};
+
+ i2c4_pins_a: i2c4-0 {
+ pins {
+ pinmux = <STM32_PINMUX('Z', 4, AF6)>, /* I2C4_SCL */
+ <STM32_PINMUX('Z', 5, AF6)>; /* I2C4_SDA */
+ bias-disable;
+ drive-open-drain;
+ slew-rate = <0>;
+ };
+ };
};
};
};