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authorAmelie Delaunay <amelie.delaunay@st.com>2018-05-17 16:21:00 +0200
committerAlexandre Torgue <alexandre.torgue@st.com>2018-07-13 13:57:02 +0200
commit7e29ed4a970ca563693ff0dac21a63977c184ce4 (patch)
treeb46d21be09b96d7e2e5f00f9ae7d53aa7cd75d9f /arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
parentdc3f8c86c10d9c3ed481af1cd219de7a37ebe5f0 (diff)
ARM: dts: stm32: add SPI1 support on stm32mp157c-ev1
This patch adds SPI1 support on stm32mp157c-ev1 board. SPI1 is available on GPIO expansion connector but kept disabled so these pins can be used as GPIOs by default. Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Diffstat (limited to 'arch/arm/boot/dts/stm32mp157-pinctrl.dtsi')
-rw-r--r--arch/arm/boot/dts/stm32mp157-pinctrl.dtsi16
1 files changed, 15 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
index a7125aecd1f7..28bad7401d2c 100644
--- a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
@@ -294,7 +294,6 @@
pins-are-numbered;
interrupt-parent = <&exti>;
st,syscfg = <&exti 0x60 0xff>;
- status = "disabled";
gpioz: gpio@54004000 {
gpio-controller;
@@ -318,6 +317,21 @@
slew-rate = <0>;
};
};
+
+ spi1_pins_a: spi1-0 {
+ pins1 {
+ pinmux = <STM32_PINMUX('Z', 0, AF5)>, /* SPI1_SCK */
+ <STM32_PINMUX('Z', 2, AF5)>; /* SPI1_MOSI */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <1>;
+ };
+
+ pins2 {
+ pinmux = <STM32_PINMUX('Z', 1, AF5)>; /* SPI1_MISO */
+ bias-disable;
+ };
+ };
};
};
};