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authorChristophe Kerello <christophe.kerello@st.com>2019-06-21 16:49:47 +0200
committerAlexandre Torgue <alexandre.torgue@st.com>2019-07-25 12:04:37 +0200
commitaafa0ae33586a2e3efcd76cfe5acaf292e95b9e1 (patch)
tree1c828dd710c677433bc5c6023aca760e00ce416a /arch/arm/boot/dts/stm32mp157c.dtsi
parent2fa278e32b9f9489c85659c7da6fd1e76851ba9b (diff)
ARM: dts: stm32: add FMC2 NAND controller support on stm32mp157c
This patch adds FMC2 NAND controller support used by stm32mp157c SOC. Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Diffstat (limited to 'arch/arm/boot/dts/stm32mp157c.dtsi')
-rw-r--r--arch/arm/boot/dts/stm32mp157c.dtsi19
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi b/arch/arm/boot/dts/stm32mp157c.dtsi
index 58f3cd34f8aa..247334a6c144 100644
--- a/arch/arm/boot/dts/stm32mp157c.dtsi
+++ b/arch/arm/boot/dts/stm32mp157c.dtsi
@@ -1239,6 +1239,25 @@
dma-requests = <48>;
};
+ fmc: nand-controller@58002000 {
+ compatible = "st,stm32mp15-fmc2";
+ reg = <0x58002000 0x1000>,
+ <0x80000000 0x1000>,
+ <0x88010000 0x1000>,
+ <0x88020000 0x1000>,
+ <0x81000000 0x1000>,
+ <0x89010000 0x1000>,
+ <0x89020000 0x1000>;
+ interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&mdma1 20 0x10 0x12000a02 0x0 0x0>,
+ <&mdma1 20 0x10 0x12000a08 0x0 0x0>,
+ <&mdma1 21 0x10 0x12000a0a 0x0 0x0>;
+ dma-names = "tx", "rx", "ecc";
+ clocks = <&rcc FMC_K>;
+ resets = <&rcc FMC_R>;
+ status = "disabled";
+ };
+
qspi: spi@58003000 {
compatible = "st,stm32f469-qspi";
reg = <0x58003000 0x1000>, <0x70000000 0x10000000>;