diff options
| author | Amelie Delaunay <amelie.delaunay@st.com> | 2018-05-17 17:47:00 +0200 |
|---|---|---|
| committer | Alexandre Torgue <alexandre.torgue@st.com> | 2018-07-13 13:56:59 +0200 |
| commit | e2c205ab669b165190b19c1f925d96edba394339 (patch) | |
| tree | 8b6ceb9900a6ca3302b4be8df0c519b140e35ced /arch/arm/boot/dts/stm32mp157c.dtsi | |
| parent | 359754ed7a1efe0b08f5dd122015af53413c1bed (diff) | |
ARM: dts: stm32: add USB OTG HS support for stm32mp157c SoC
This patch adds support for USB OTG HS on STM32MP157C SoC.
USB OTG HS controller is based on DWC2 controller.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Diffstat (limited to 'arch/arm/boot/dts/stm32mp157c.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/stm32mp157c.dtsi | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi b/arch/arm/boot/dts/stm32mp157c.dtsi index d14c94034089..04c62acaf5a9 100644 --- a/arch/arm/boot/dts/stm32mp157c.dtsi +++ b/arch/arm/boot/dts/stm32mp157c.dtsi @@ -626,6 +626,21 @@ clocks = <&rcc DMAMUX>; }; + usbotg_hs: usb-otg@49000000 { + compatible = "snps,dwc2"; + reg = <0x49000000 0x10000>; + clocks = <&rcc USBO_K>; + clock-names = "otg"; + resets = <&rcc USBO_R>; + reset-names = "dwc2"; + interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; + g-rx-fifo-size = <256>; + g-np-tx-fifo-size = <32>; + g-tx-fifo-size = <128 128 64 64 64 64 32 32>; + dr_mode = "otg"; + status = "disabled"; + }; + rcc: rcc@50000000 { compatible = "st,stm32mp1-rcc", "syscon"; reg = <0x50000000 0x1000>; |