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authorMaxime Ripard <maxime.ripard@free-electrons.com>2013-08-03 16:07:36 +0200
committerMaxime Ripard <maxime.ripard@free-electrons.com>2013-08-10 19:13:45 +0200
commit278fe8b8a17a3db632180192cbc95a4df8fc8023 (patch)
treea0f027acf806d45e4d962c2bd38f3cde98c98d0c /arch/arm/boot/dts/sun5i-a13-olinuxino.dts
parentd528b0340c88103e69117b0ae24f3c57a48fef67 (diff)
ARM: sun5i: dt: Fix A13 SoC bus base address
There was a typo in the base address used for the soc node in the A13 device tree. Fix it with the proper base address. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'arch/arm/boot/dts/sun5i-a13-olinuxino.dts')
-rw-r--r--arch/arm/boot/dts/sun5i-a13-olinuxino.dts2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/sun5i-a13-olinuxino.dts b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts
index 80497e376706..9e508dcc4245 100644
--- a/arch/arm/boot/dts/sun5i-a13-olinuxino.dts
+++ b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts
@@ -22,7 +22,7 @@
bootargs = "earlyprintk console=ttyS0,115200";
};
- soc@01c20000 {
+ soc@01c00000 {
pinctrl@01c20800 {
led_pins_olinuxino: led_pins@0 {
allwinner,pins = "PG9";