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authorChen-Yu Tsai <wens@csie.org>2017-01-18 09:01:05 +0800
committerMaxime Ripard <maxime.ripard@free-electrons.com>2017-01-18 08:10:44 +0100
commitc9c9ac714b3f246b6f920238bcce9d47af6a045a (patch)
tree53f40d46010d7e1880179a4504a868da89287442 /arch/arm/boot/dts/sun6i-a31s-sina31s.dts
parent3995d3f40bdb5f53e32890c66d2b995ddc10fbf7 (diff)
ARM: dts: sun6i: sina31s: Enable USB OTG controller in peripheral mode
While the SinA31s does have a proper 5-pin mini USB OTG port, the ID pin does not seem to work. The pin used in the schematics is always low, regardless of the attached OTG cable or SoC internal pin bias settings. The v1.5 board is missing bias resistors shown in the schematics for earlier revisions, and the connections of the remaining one does not match the schematics either. In addition, VBUS for this port is disconnected from the board's 5V power rail. The board features a pad to solder jumper pins to connect VBUS to 5V manually. Given the above and the fact that the board has 5 more USB host ports, it makes more sense to have the OTG port work in peripheral mode. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'arch/arm/boot/dts/sun6i-a31s-sina31s.dts')
-rw-r--r--arch/arm/boot/dts/sun6i-a31s-sina31s.dts5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun6i-a31s-sina31s.dts b/arch/arm/boot/dts/sun6i-a31s-sina31s.dts
index 8743aeed1275..7ff68bdd7109 100644
--- a/arch/arm/boot/dts/sun6i-a31s-sina31s.dts
+++ b/arch/arm/boot/dts/sun6i-a31s-sina31s.dts
@@ -153,6 +153,11 @@
regulator-name = "vcc-gmac-phy";
};
+&usb_otg {
+ dr_mode = "peripheral";
+ status = "okay";
+};
+
&usbphy {
status = "okay";
};