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authorChen-Yu Tsai <wens@csie.org>2015-12-05 21:16:47 +0800
committerMaxime Ripard <maxime.ripard@free-electrons.com>2015-12-08 11:06:28 +0100
commitf0571ab140723f9a898d4a404118580534dcc468 (patch)
tree84503738629dd6ed4c1243b35ec06bc48a175273 /arch/arm/boot/dts/sun7i-a20.dtsi
parent1ccc4939220cf815c309feddcf82dba260499194 (diff)
ARM: dts: sun7i: Add VE (Video Engine) module clock node
The video engine has its own module clock, which also includes a reset control for it. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'arch/arm/boot/dts/sun7i-a20.dtsi')
-rw-r--r--arch/arm/boot/dts/sun7i-a20.dtsi9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index 21169c0a6627..0940a788f824 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -527,6 +527,15 @@
"dram_de_mp", "dram_ace";
};
+ ve_clk: clk@01c2013c {
+ #clock-cells = <0>;
+ #reset-cells = <0>;
+ compatible = "allwinner,sun4i-a10-ve-clk";
+ reg = <0x01c2013c 0x4>;
+ clocks = <&pll4>;
+ clock-output-names = "ve";
+ };
+
codec_clk: clk@01c20140 {
#clock-cells = <0>;
compatible = "allwinner,sun4i-a10-codec-clk";