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authorChen-Yu Tsai <wens@csie.org>2014-08-17 11:52:15 +0800
committerMaxime Ripard <maxime.ripard@free-electrons.com>2014-08-17 09:59:29 +0200
commitcd78d3f2d716c291481206d4f87f1eeb20278f24 (patch)
tree984966033cfb6398354fe6768b99ec9a087d9453 /arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts
parenteacda1f11fcb8e38cdc9954c1f9cce295315bcab (diff)
ARM: dts: sun8i: Enable mmc controller on ippo-q8h-v5
The card detect pin setting was taken from the original fex file, and is confirmed to work. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts')
-rw-r--r--arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts20
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts b/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts
index 224f53ef8ebc..ef1e4f3aaf39 100644
--- a/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts
+++ b/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts
@@ -13,6 +13,7 @@
/dts-v1/;
/include/ "sun8i-a23.dtsi"
+/include/ "sunxi-common-regulators.dtsi"
/ {
model = "Ippo Q8H Dual Core Tablet (v5)";
@@ -23,6 +24,25 @@
};
soc@01c00000 {
+ mmc0: mmc@01c0f000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_q8h>;
+ vmmc-supply = <&reg_vcc3v0>;
+ bus-width = <4>;
+ cd-gpios = <&pio 1 4 0>; /* PB4 */
+ cd-inverted;
+ status = "okay";
+ };
+
+ pinctrl@01c20800 {
+ mmc0_cd_pin_q8h: mmc0_cd_pin@0 {
+ allwinner,pins = "PB4";
+ allwinner,function = "gpio_in";
+ allwinner,drive = <0>;
+ allwinner,pull = <1>;
+ };
+ };
+
r_uart: serial@01f02800 {
pinctrl-names = "default";
pinctrl-0 = <&r_uart_pins_a>;