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authorPhilipp Rossak <embed3d@gmail.com>2018-08-01 11:47:58 +0200
committerChen-Yu Tsai <wens@csie.org>2018-08-27 10:41:13 +0800
commita8858d871c062f3f74f4060d3ca6a3d6ca88f441 (patch)
tree1a021c61dad5dbc30c9f77d199de24fb5e37291b /arch/arm/boot/dts/sun8i-a83t.dtsi
parent5b394b2ddf0347bef56e50c69a58773c94343ff3 (diff)
ARM: dts: sun8i: a83t: Add the cir pin for the A83T
The CIR Pin of the A83T is located at PL12. Signed-off-by: Philipp Rossak <embed3d@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Diffstat (limited to 'arch/arm/boot/dts/sun8i-a83t.dtsi')
-rw-r--r--arch/arm/boot/dts/sun8i-a83t.dtsi5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index 00a02b037320..9322f8f6faac 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -1002,6 +1002,11 @@
interrupt-controller;
#interrupt-cells = <3>;
+ r_cir_pin: r-cir-pin {
+ pins = "PL12";
+ function = "s_cir_rx";
+ };
+
r_rsb_pins: r-rsb-pins {
pins = "PL0", "PL1";
function = "s_rsb";