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authorIvan Uvarov <i.uvarov@cognitivepilot.com>2021-04-07 14:14:24 +0300
committerMaxime Ripard <maxime@cerno.tech>2021-05-10 09:14:41 +0200
commitfd5ef505453f995b4ce6ef6e43ddc15967a94a96 (patch)
tree4778b59b9b56d129285508fc8c6e6f55a649b6eb /arch/arm/boot/dts/sun8i-r40.dtsi
parent6efb943b8616ec53a5e444193dccf1af9ad627b5 (diff)
ARM: dts: sun8i: r40: add /omit-if-no-ref/ to pinmux nodes for UARTs 0&3
This patch adds the /omit-if-no-ref/ keyword to the pio nodes for UART0 and UART3 pins of the R40 SoC, which would reduce the fdt size on boards which do not use these UARTs. Signed-off-by: Ivan Uvarov <i.uvarov@cognitivepilot.com> 1 file changed, 3 insertions(+) Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20210407111428.3755684-2-i.uvarov@cognitivepilot.com
Diffstat (limited to 'arch/arm/boot/dts/sun8i-r40.dtsi')
-rw-r--r--arch/arm/boot/dts/sun8i-r40.dtsi3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi
index d5ad3b9efd12..0b257a07792f 100644
--- a/arch/arm/boot/dts/sun8i-r40.dtsi
+++ b/arch/arm/boot/dts/sun8i-r40.dtsi
@@ -631,16 +631,19 @@
function = "spi1";
};
+ /omit-if-no-ref/
uart0_pb_pins: uart0-pb-pins {
pins = "PB22", "PB23";
function = "uart0";
};
+ /omit-if-no-ref/
uart3_pg_pins: uart3-pg-pins {
pins = "PG6", "PG7";
function = "uart3";
};
+ /omit-if-no-ref/
uart3_rts_cts_pg_pins: uart3-rts-cts-pg-pins {
pins = "PG8", "PG9";
function = "uart3";