diff options
| author | Ivan Uvarov <i.uvarov@cognitivepilot.com> | 2021-04-07 14:14:25 +0300 |
|---|---|---|
| committer | Maxime Ripard <maxime@cerno.tech> | 2021-05-10 09:14:42 +0200 |
| commit | 492dd7309aed4d2313a6f9d9a26f88707f51161b (patch) | |
| tree | 9d94fd2fcb8a0cbe680cbbbe256357527de94e21 /arch/arm/boot/dts/sun8i-r40.dtsi | |
| parent | fd5ef505453f995b4ce6ef6e43ddc15967a94a96 (diff) | |
ARM: dts: sun8i: r40: add pinmux settings for MMC3 and UARTs 2, 4, 5&7
The Forlinx OKA40i-C devboard makes use of UARTs 0,2,3,4,5 and 7 of the R40
SoC, of which UART 0 is connected to an RS232 converter, UART 5 routed to
an RS485 converter, and the rest broken out directly via labeled headers.
The board also contains a micro-SD slot connected to SDC3.
This patch adds settings to R40's pinmux node for MMC3 and those UARTs that
were not already mapped, which would allow us to make use of all available
UARTs and the micro-SD slot on this board in a further patch.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Ivan Uvarov <i.uvarov@cognitivepilot.com>
1 file changed, 41 insertions(+)
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20210407111428.3755684-3-i.uvarov@cognitivepilot.com
Diffstat (limited to 'arch/arm/boot/dts/sun8i-r40.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/sun8i-r40.dtsi | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi index 0b257a07792f..03e054c0bac4 100644 --- a/arch/arm/boot/dts/sun8i-r40.dtsi +++ b/arch/arm/boot/dts/sun8i-r40.dtsi @@ -357,6 +357,8 @@ clock-names = "ahb", "mmc"; resets = <&ccu RST_BUS_MMC3>; reset-names = "ahb"; + pinctrl-0 = <&mmc3_pins>; + pinctrl-names = "default"; interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; #address-cells = <1>; @@ -602,6 +604,15 @@ }; /omit-if-no-ref/ + mmc3_pins: mmc3-pins { + pins = "PI4", "PI5", "PI6", + "PI7", "PI8", "PI9"; + function = "mmc3"; + drive-strength = <30>; + bias-pull-up; + }; + + /omit-if-no-ref/ spi0_pc_pins: spi0-pc-pins { pins = "PC0", "PC1", "PC2"; function = "spi0"; @@ -638,6 +649,18 @@ }; /omit-if-no-ref/ + uart2_pi_pins: uart2-pi-pins { + pins = "PI18", "PI19"; + function = "uart2"; + }; + + /omit-if-no-ref/ + uart2_rts_cts_pi_pins: uart2-rts-cts-pi-pins{ + pins = "PI16", "PI17"; + function = "uart2"; + }; + + /omit-if-no-ref/ uart3_pg_pins: uart3-pg-pins { pins = "PG6", "PG7"; function = "uart3"; @@ -648,6 +671,24 @@ pins = "PG8", "PG9"; function = "uart3"; }; + + /omit-if-no-ref/ + uart4_pg_pins: uart4-pg-pins { + pins = "PG10", "PG11"; + function = "uart4"; + }; + + /omit-if-no-ref/ + uart5_ph_pins: uart5-ph-pins { + pins = "PH6", "PH7"; + function = "uart5"; + }; + + /omit-if-no-ref/ + uart7_pi_pins: uart7-pi-pins { + pins = "PI20", "PI21"; + function = "uart7"; + }; }; wdt: watchdog@1c20c90 { |