diff options
| author | Chen-Yu Tsai <wens@csie.org> | 2019-02-06 11:32:39 +0800 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@bootlin.com> | 2019-02-07 16:51:13 +0100 |
| commit | 98048143b7f83ee3fc70f4522ff9b8fa11f8b0a5 (patch) | |
| tree | 245b94678addaa1da6850b441926cc0f961cf2f7 /arch/arm/boot/dts/sun9i-a80-cubieboard4.dts | |
| parent | bc9bd03a44f900ae30a1d0f425a2fd092444e335 (diff) | |
ARM: dts: sun9i: cubieboard4: Enable GMAC
The Cubieboard4 has a Realtek RTL8211E ethernet PHY which uses RGMII to
talk to the MAC. The PHY is powered by 2 regulators: cldo1 for the PHY's
core logic and gpio1-ldo for I/O. The latter also powers the SoC side
pins. As there is no binding to model a second regulator supply for the
PHY, it is omitted. It is however properly modeled for the PIO.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Diffstat (limited to 'arch/arm/boot/dts/sun9i-a80-cubieboard4.dts')
| -rw-r--r-- | arch/arm/boot/dts/sun9i-a80-cubieboard4.dts | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts b/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts index 0daab9b374e6..28c034928d67 100644 --- a/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts +++ b/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts @@ -133,6 +133,19 @@ status = "okay"; }; +&gmac { + pinctrl-names = "default"; + pinctrl-0 = <&gmac_rgmii_pins>; + phy = <&phy1>; + phy-mode = "rgmii"; + phy-supply = <®_cldo1>; + status = "okay"; + + phy1: ethernet-phy@1 { + reg = <1>; + }; +}; + &i2c3 { pinctrl-names = "default"; pinctrl-0 = <&i2c3_pins>; @@ -402,6 +415,14 @@ */ regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; + /* + * The PHY requires 20ms after all voltages + * are applied until core logic is ready and + * 30ms after the reset pin is de-asserted. + * Set a 100ms delay to account for PMIC + * ramp time and board traces. + */ + regulator-enable-ramp-delay = <100000>; regulator-name = "vcc-gmac-phy"; }; |