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authorChen-Yu Tsai <wens@csie.org>2014-10-31 11:05:50 +0800
committerMaxime Ripard <maxime.ripard@free-electrons.com>2014-10-31 09:25:41 +0100
commit2a950b2ca039b0e49c350b8690dcc096077ca2d3 (patch)
treece3b28a7182cd2349778ecbff02ea6a81bf96b3b /arch/arm/boot/dts/sun9i-a80.dtsi
parent0cc4539901c6b30c88042b60aae2edab61703297 (diff)
ARM: dts: sun9i: Add uart4 pinmux setting for A80 SoC
uart4 only has one possible pinmux setting on the A80 SoC. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'arch/arm/boot/dts/sun9i-a80.dtsi')
-rw-r--r--arch/arm/boot/dts/sun9i-a80.dtsi7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi
index 0a1f1a888308..494714f67b57 100644
--- a/arch/arm/boot/dts/sun9i-a80.dtsi
+++ b/arch/arm/boot/dts/sun9i-a80.dtsi
@@ -365,6 +365,13 @@
allwinner,drive = <0>;
allwinner,pull = <0>;
};
+
+ uart4_pins_a: uart4@0 {
+ allwinner,pins = "PG12", "PG13", "PG14", "PG15";
+ allwinner,function = "uart4";
+ allwinner,drive = <0>;
+ allwinner,pull = <0>;
+ };
};
uart0: serial@07000000 {