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authorChen-Yu Tsai <wens@csie.org>2015-03-18 16:00:28 +0800
committerMaxime Ripard <maxime.ripard@free-electrons.com>2015-04-27 08:20:29 +0200
commit51e9f5ffc5b88ea0d2626edef737e582fe7039d8 (patch)
tree62e6e313900327a1eda0f797c1f8cd097a81e129 /arch/arm/boot/dts/sun9i-a80.dtsi
parent65ef564f06c30f779a7472ab441fd1964a5f0e47 (diff)
ARM: dts: sun9i: Enable ARM architected timer on A80
The A80 SoC has the architected timer, but the existing firmware from Allwinner does not set CNTFRQ at all. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'arch/arm/boot/dts/sun9i-a80.dtsi')
-rw-r--r--arch/arm/boot/dts/sun9i-a80.dtsi10
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi
index abe7bbf8aa83..d3dece2eea72 100644
--- a/arch/arm/boot/dts/sun9i-a80.dtsi
+++ b/arch/arm/boot/dts/sun9i-a80.dtsi
@@ -114,6 +114,16 @@
reg = <0 0x20000000 0x02 0>;
};
+ timer {
+ compatible = "arm,armv7-timer";
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+ clock-frequency = <24000000>;
+ arm,cpu-registers-not-fw-configured;
+ };
+
clocks {
#address-cells = <1>;
#size-cells = <1>;