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authorChen-Yu Tsai <wens@csie.org>2019-01-09 23:02:57 +0800
committerMaxime Ripard <maxime.ripard@bootlin.com>2019-01-09 16:33:25 +0100
commitc322e85ad1d4c4459e0c722d6467772a39a7743d (patch)
tree6f8ee39b3f704e0f2ed3e7612dda6c166d6c1544 /arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi
parent1e5f1db4ccd8348a21da55bff82f4263000879ef (diff)
ARM: dts: sunxi: bananapi-m2-plus: Add Bluetooth device node
The AP6212 is based on the Broadcom BCM43430 or BCM43438. The WiFi side identifies as BCM43430, while the Bluetooth side identifies as BCM43438. The Bluetooth side is connected to UART1 in a 4 wire configuration. Same as the WiFi side, due to being the same chip and package, the board's fixed 3.3V power regulator provides overall power via VBAT and I/O power via VDDIO. The RTC clock output from the SoC provides the LPO low power clock at 32.768 kHz. This patch enables Bluetooth on this board, and also adds the missing LPO clock on the WiFi side. There is also a PCM connection for Bluetooth, but this is not covered here. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Diffstat (limited to 'arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi')
-rw-r--r--arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi16
1 files changed, 15 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi b/arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi
index b3283aeb5b7d..3bed375b9c03 100644
--- a/arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi
+++ b/arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi
@@ -103,6 +103,8 @@
compatible = "mmc-pwrseq-simple";
pinctrl-names = "default";
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
+ clocks = <&rtc 1>;
+ clock-names = "ext_clock";
};
};
@@ -215,7 +217,19 @@
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
- status = "okay";
+ uart-has-rtscts;
+ status = "okay";
+
+ bluetooth {
+ compatible = "brcm,bcm43438-bt";
+ clocks = <&rtc 1>;
+ clock-names = "lpo";
+ vbat-supply = <&reg_vcc3v3>;
+ vddio-supply = <&reg_vcc3v3>;
+ device-wakeup-gpios = <&pio 6 13 GPIO_ACTIVE_HIGH>; /* PG13 */
+ host-wakeup-gpios = <&pio 6 11 GPIO_ACTIVE_HIGH>; /* PG11 */
+ shutdown-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
+ };
};
&usb_otg {