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authorKarl Palsson <karlp@tweak.net.au>2019-10-31 23:11:02 +0000
committerMaxime Ripard <maxime@cerno.tech>2019-11-01 10:04:52 +0100
commit6d1aa40e109b6a30ce0ffa2dc56afc6442104986 (patch)
treed3f0ee7cba2c77f2c82389e92ac604b8fa2d60eb /arch/arm/boot/dts/sunxi-h3-h5.dtsi
parentedabfce623fb1aceb8f4a2e0c53f9256b979223d (diff)
ARM: dts: sunxi: h3/h5: add missing uart2 rts/cts pins
uart1 and uart3 had existing pin definitions for the rts/cts pairs. Add definitions for uart2 as well. Signed-off-by: Karl Palsson <karlp@tweak.net.au> Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Diffstat (limited to 'arch/arm/boot/dts/sunxi-h3-h5.dtsi')
-rw-r--r--arch/arm/boot/dts/sunxi-h3-h5.dtsi5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index eba190b3f9de..8df29cd05b83 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -472,6 +472,11 @@
function = "uart2";
};
+ uart2_rts_cts_pins: uart2-rts-cts-pins {
+ pins = "PA2", "PA3";
+ function = "uart2";
+ };
+
uart3_pins: uart3-pins {
pins = "PA13", "PA14";
function = "uart3";