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authorMarcel Ziswiler <marcel.ziswiler@toradex.com>2018-09-02 12:08:52 +0200
committerThierry Reding <treding@nvidia.com>2018-09-26 16:55:15 +0200
commitd5178bb6f86084eff4ccaf322775b9d558bbd326 (patch)
tree028b1d9c6fbb5545ba94da4e484c82896c203a6a /arch/arm/boot/dts/tegra20-colibri.dtsi
parentdf2be1ae626a0e748f5266e6a7a5134a19490617 (diff)
ARM: tegra: colibri_t20: add i2c-thermtrip
Add i2c-thermtrip which would set the SLEEP MODE bit in the SUPPLYENE register of the TPS658643 PMIC. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra20-colibri.dtsi')
-rw-r--r--arch/arm/boot/dts/tegra20-colibri.dtsi8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra20-colibri.dtsi b/arch/arm/boot/dts/tegra20-colibri.dtsi
index 477d67ff74c6..9ec56f49c30c 100644
--- a/arch/arm/boot/dts/tegra20-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra20-colibri.dtsi
@@ -598,6 +598,14 @@
nvidia,core-pwr-good-time = <3845 3845>;
nvidia,core-pwr-off-time = <3875>;
nvidia,sys-clock-req-active-high;
+
+ /* Set SLEEP MODE bit in SUPPLYENE register of TPS658643 PMIC */
+ i2c-thermtrip {
+ nvidia,i2c-controller-id = <3>;
+ nvidia,bus-addr = <0x34>;
+ nvidia,reg-addr = <0x14>;
+ nvidia,reg-data = <0x8>;
+ };
};
memory-controller@7000f400 {