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| author | Dmitry Osipenko <digetx@gmail.com> | 2021-06-01 05:31:16 +0300 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2021-06-01 13:45:01 +0200 |
| commit | 5f459cb0d67d6df6f74eac253ea10de9e9986812 (patch) | |
| tree | 2bef94c681b76c093abf915d81fbf044c95e015a /arch/arm/boot/dts/tegra20-paz00.dts | |
| parent | c4a41429951890d0bf7c1ef49b1fa1c8dfb1a034 (diff) | |
dt-bindings: soc: tegra-pmc: Document core power domain
All NVIDIA Tegra SoCs have a core power domain where majority of hardware
blocks reside. Document the new core power domain properties.
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra20-paz00.dts')
0 files changed, 0 insertions, 0 deletions