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authorMasahiro Yamada <yamada.masahiro@socionext.com>2017-10-18 13:24:32 +0900
committerMasahiro Yamada <yamada.masahiro@socionext.com>2017-10-24 02:08:52 +0900
commit5d4bc4bd41261e5630cdd76639e9c8329ab4f4e5 (patch)
tree93418d4f7b29c08cc56e4b8b5b63fbca58122b44 /arch/arm/boot/dts/uniphier-pxs2.dtsi
parent1658b84de41b8c4bef7b2e85532249294a313cb4 (diff)
ARM: dts: uniphier: add GPIO controller nodes
The GPIO controller also acts as an interrupt controller and the interrupt lines are connected to the AIDET block. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm/boot/dts/uniphier-pxs2.dtsi')
-rw-r--r--arch/arm/boot/dts/uniphier-pxs2.dtsi17
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/uniphier-pxs2.dtsi b/arch/arm/boot/dts/uniphier-pxs2.dtsi
index d3ee451328bd..a745437e6595 100644
--- a/arch/arm/boot/dts/uniphier-pxs2.dtsi
+++ b/arch/arm/boot/dts/uniphier-pxs2.dtsi
@@ -205,6 +205,23 @@
clocks = <&peri_clk 3>;
};
+ gpio: gpio@55000000 {
+ compatible = "socionext,uniphier-gpio";
+ reg = <0x55000000 0x200>;
+ interrupt-parent = <&aidet>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&pinctrl 0 0 0>,
+ <&pinctrl 96 0 0>;
+ gpio-ranges-group-names = "gpio_range0",
+ "gpio_range1";
+ ngpios = <232>;
+ socionext,interrupt-ranges = <0 48 16>, <16 154 5>,
+ <21 217 3>;
+ };
+
i2c0: i2c@58780000 {
compatible = "socionext,uniphier-fi2c";
status = "disabled";