diff options
| author | Kunihiko Hayashi <hayashi.kunihiko@socionext.com> | 2018-07-26 16:09:59 +0900 |
|---|---|---|
| committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2018-08-28 23:17:55 +0900 |
| commit | 92fa4f4cc2cdf70a7db650c09fd6ee5598ebe52b (patch) | |
| tree | 63ae0ca3499b91b8e539dc7d8a95fdea5aa812ee /arch/arm/boot/dts/uniphier-pxs2.dtsi | |
| parent | dc0a2098cc2a673b9315d1ac3f577fa53dd5ea74 (diff) | |
ARM: dts: uniphier: add SPI node for UniPhier 32bit SoCs
Add nodes of SPI controller for LD4, Pro4, sLD8, Pro5 and PXs2.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm/boot/dts/uniphier-pxs2.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/uniphier-pxs2.dtsi | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/uniphier-pxs2.dtsi b/arch/arm/boot/dts/uniphier-pxs2.dtsi index 79f5c2d7ffcf..d5b54461a7ab 100644 --- a/arch/arm/boot/dts/uniphier-pxs2.dtsi +++ b/arch/arm/boot/dts/uniphier-pxs2.dtsi @@ -167,6 +167,28 @@ cache-level = <2>; }; + spi0: spi@54006000 { + compatible = "socionext,uniphier-scssi"; + status = "disabled"; + reg = <0x54006000 0x100>; + interrupts = <0 39 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spi0>; + clocks = <&peri_clk 11>; + resets = <&peri_rst 11>; + }; + + spi1: spi@54006100 { + compatible = "socionext,uniphier-scssi"; + status = "disabled"; + reg = <0x54006100 0x100>; + interrupts = <0 216 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spi1>; + clocks = <&peri_clk 11>; + resets = <&peri_rst 11>; + }; + serial0: serial@54006800 { compatible = "socionext,uniphier-uart"; status = "disabled"; |