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authorMasahiro Yamada <yamada.masahiro@socionext.com>2019-06-21 19:53:16 +0900
committerMasahiro Yamada <yamada.masahiro@socionext.com>2019-06-26 00:06:50 +0900
commitbc8841f0c1e6945fd7fde6faad3300d1b08abd86 (patch)
treeeb3a16a4d6deb350109c1155a29f34c441212d5f /arch/arm/boot/dts/uniphier-sld8-ref.dts
parenta188339ca5a396acc588e5851ed7e19f66b0ebd9 (diff)
ARM: dts: uniphier: update to new Denali NAND binding
With commit d8e8fd0ebf8b ("mtd: rawnand: denali: decouple controller and NAND chips"), the Denali NAND controller driver migrated to the new controller/chip representation. Update DT for it. In the new binding, the number of connected chips are described in DT instead of run-time probed. I added just one chip to the reference boards, where we do not know if the on-board NAND device is a single chip or multiple chips. If we added too many chips into DT, it would end up with the timeout error in nand_scan_ident(). I changed all the pinctrl properties to use the single CS. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm/boot/dts/uniphier-sld8-ref.dts')
-rw-r--r--arch/arm/boot/dts/uniphier-sld8-ref.dts4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/uniphier-sld8-ref.dts b/arch/arm/boot/dts/uniphier-sld8-ref.dts
index 01bf94c6b93a..cf9ea0b15065 100644
--- a/arch/arm/boot/dts/uniphier-sld8-ref.dts
+++ b/arch/arm/boot/dts/uniphier-sld8-ref.dts
@@ -81,4 +81,8 @@
&nand {
status = "okay";
+
+ nand@0 {
+ reg = <0>;
+ };
};