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| author | Daniel Palmer <daniel@0x0f.com> | 2021-02-23 15:18:26 +0900 |
|---|---|---|
| committer | Romain Perier <romain.perier@gmail.com> | 2022-02-16 19:17:25 +0100 |
| commit | 62a2718bf4c29328f1149e0dc4be0c88095112c5 (patch) | |
| tree | 156aae6260d309b20cf46821563dabe0eb38013d /arch/arm/boot/dts | |
| parent | 6979b5fedb92c2e8f9aa7636cea1d2cb655f6f8d (diff) | |
ARM: mstar: Link cpupll to cpu
The CPU clock is sourced from the CPU PLL.
Link cpupll to the cpu so that frequency scaling can happen.
Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Reviewed-by: Romain Perier <romain.perier@gmail.com>
Diffstat (limited to 'arch/arm/boot/dts')
| -rw-r--r-- | arch/arm/boot/dts/mstar-v7.dtsi | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/mstar-v7.dtsi b/arch/arm/boot/dts/mstar-v7.dtsi index 2249faaa3aa7..c26ba9b7b6dd 100644 --- a/arch/arm/boot/dts/mstar-v7.dtsi +++ b/arch/arm/boot/dts/mstar-v7.dtsi @@ -21,6 +21,8 @@ device_type = "cpu"; compatible = "arm,cortex-a7"; reg = <0x0>; + clocks = <&cpupll>; + clock-names = "cpuclk"; }; }; |