diff options
| author | Claudiu Beznea <claudiu.beznea@microchip.com> | 2021-10-20 12:46:56 +0300 |
|---|---|---|
| committer | Nicolas Ferre <nicolas.ferre@microchip.com> | 2021-10-21 13:45:16 +0200 |
| commit | f3c0366411d6893360be21a7544595bf275bc9b2 (patch) | |
| tree | 1270cc90e378dc5a9780a99c66af95ad02f82039 /arch/arm/boot/dts | |
| parent | 9430ff34385e285984711fccb2226771cbc675fb (diff) | |
ARM: dts: at91: sama7g5-ek: use blocks 0 and 1 of TCB0 as cs and ce
Use blocks 0 and 1 of TCB0 for clocksource and clockevent functionality.
PIT64B is already enabled on SAMA7G5 targets for this but TCB0 will be
used as a fallback only in case PIT64B will fail to probe.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20211020094656.3343242-4-claudiu.beznea@microchip.com
Diffstat (limited to 'arch/arm/boot/dts')
| -rw-r--r-- | arch/arm/boot/dts/at91-sama7g5ek.dts | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/at91-sama7g5ek.dts b/arch/arm/boot/dts/at91-sama7g5ek.dts index c46be165f2ba..902036a50e2e 100644 --- a/arch/arm/boot/dts/at91-sama7g5ek.dts +++ b/arch/arm/boot/dts/at91-sama7g5ek.dts @@ -654,6 +654,18 @@ status = "okay"; }; +&tcb0 { + timer0: timer@0 { + compatible = "atmel,tcb-timer"; + reg = <0>; + }; + + timer1: timer@1 { + compatible = "atmel,tcb-timer"; + reg = <1>; + }; +}; + &trng { status = "okay"; }; |