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authorRussell King <rmk+kernel@arm.linux.org.uk>2013-05-19 01:22:53 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2013-05-22 10:52:24 +0100
commitf150abe1012f2fc7d444d33d651db32435038c11 (patch)
treec42777a7237d97a32692ed41e174fbe92a32f69a /arch/arm/include/asm/assembler.h
parent519fe2ecb755b875d9814cdda19778c2e88c6901 (diff)
parent6fae9cdafc92ae9958a3a45dd68205f72e3ad900 (diff)
Merge branch 'for-next' of git://git.pengutronix.de/git/ukl/linux into devel-stable
Pull ARM-v7M support from Uwe Kleine-König: "All but the last patch were in next since next-20130418 without issues. The last patch fixes a problem in combination with 8164f7a (ARM: 7680/1: Detect support for SDIV/UDIV from ISAR0 register) which triggers a WARN_ON without an implemented read_cpuid_ext. The branch merges fine into v3.10-rc1 and I'd be happy if you pulled it for 3.11-rc1. The only missing piece to be able to run a Cortex-M3 is the irqchip driver that will go in via Thomas Gleixner and platform specific stuff."
Diffstat (limited to 'arch/arm/include/asm/assembler.h')
-rw-r--r--arch/arm/include/asm/assembler.h17
1 files changed, 16 insertions, 1 deletions
diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h
index 05ee9eebad6b..a5fef710af32 100644
--- a/arch/arm/include/asm/assembler.h
+++ b/arch/arm/include/asm/assembler.h
@@ -136,7 +136,11 @@
* assumes FIQs are enabled, and that the processor is in SVC mode.
*/
.macro save_and_disable_irqs, oldcpsr
+#ifdef CONFIG_CPU_V7M
+ mrs \oldcpsr, primask
+#else
mrs \oldcpsr, cpsr
+#endif
disable_irq
.endm
@@ -150,7 +154,11 @@
* guarantee that this will preserve the flags.
*/
.macro restore_irqs_notrace, oldcpsr
+#ifdef CONFIG_CPU_V7M
+ msr primask, \oldcpsr
+#else
msr cpsr_c, \oldcpsr
+#endif
.endm
.macro restore_irqs, oldcpsr
@@ -229,7 +237,14 @@
#endif
.endm
-#ifdef CONFIG_THUMB2_KERNEL
+#if defined(CONFIG_CPU_V7M)
+ /*
+ * setmode is used to assert to be in svc mode during boot. For v7-M
+ * this is done in __v7m_setup, so setmode can be empty here.
+ */
+ .macro setmode, mode, reg
+ .endm
+#elif defined(CONFIG_THUMB2_KERNEL)
.macro setmode, mode, reg
mov \reg, #\mode
msr cpsr_c, \reg