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authorNicolas Pitre <nicolas.pitre@linaro.org>2013-04-23 16:45:40 -0400
committerNicolas Pitre <nicolas.pitre@linaro.org>2013-04-24 10:36:09 -0400
commit0c91e7e07ebf08092bf8e28d8cd8d420732fc716 (patch)
treeb41072b6c178770a81cd639a890ce7c7aa58dab7 /arch/arm/include/asm/mcpm.h
parent6210d421c20f12ef4e8c9826973478beb104114d (diff)
ARM: cacheflush: add synchronization helpers for mixed cache state accesses
Algorithms used by the MCPM layer rely on state variables which are accessed while the cache is either active or inactive, depending on the code path and the active state. This patch introduces generic cache maintenance helpers to provide the necessary cache synchronization for such state variables to always hit main memory in an ordered way. Signed-off-by: Nicolas Pitre <nico@linaro.org> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Dave Martin <dave.martin@linaro.org>
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