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authorCatalin Marinas <catalin.marinas@arm.com>2009-05-30 14:00:18 +0100
committerCatalin Marinas <catalin.marinas@arm.com>2009-05-30 14:00:18 +0100
commit26584853a44c58f3d6ac7360d697a2ddcd1a3efa (patch)
treea47156d781c6207d316746a056a81ca82b90d452 /arch/arm/include/asm/processor.h
parentee8c9571191e588ede9a220ded807e33c4897d91 (diff)
Add core support for ARMv6/v7 big-endian
Starting with ARMv6, the CPUs support the BE-8 variant of big-endian (byte-invariant). This patch adds the core support: - setting of the BE-8 mode via the CPSR.E register for both kernel and user threads - big-endian page table walking - REV used to rotate instructions read from memory during fault processing as they are still little-endian format - Kconfig and Makefile support for BE-8. The --be8 option must be passed to the final linking stage to convert the instructions to little-endian Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm/include/asm/processor.h')
-rw-r--r--arch/arm/include/asm/processor.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/include/asm/processor.h b/arch/arm/include/asm/processor.h
index 1845892260e7..6a89567ffc5b 100644
--- a/arch/arm/include/asm/processor.h
+++ b/arch/arm/include/asm/processor.h
@@ -71,6 +71,7 @@ struct thread_struct {
regs->ARM_cpsr = USR26_MODE; \
if (elf_hwcap & HWCAP_THUMB && pc & 1) \
regs->ARM_cpsr |= PSR_T_BIT; \
+ regs->ARM_cpsr |= PSR_ENDSTATE; \
regs->ARM_pc = pc & ~1; /* pc */ \
regs->ARM_sp = sp; /* sp */ \
regs->ARM_r2 = stack[2]; /* r2 (envp) */ \