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| author | Russell King <rmk+kernel@armlinux.org.uk> | 2017-11-08 19:42:47 +0000 |
|---|---|---|
| committer | Russell King <rmk+kernel@armlinux.org.uk> | 2017-11-08 19:42:47 +0000 |
| commit | 02196144a0a0ad71fb75bd4a5a4785ab36c3b78e (patch) | |
| tree | b87fe75626250a456604a331faf3594b4f3925a8 /arch/arm/include/asm/v7m.h | |
| parent | 7f3d1f984336377074ebf804ff53869ef1906fbe (diff) | |
| parent | fe9c0589eeef4b3edbaad9f7500679a2eeafe951 (diff) | |
Merge branch 'devel-stable' into for-next
Diffstat (limited to 'arch/arm/include/asm/v7m.h')
| -rw-r--r-- | arch/arm/include/asm/v7m.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/include/asm/v7m.h b/arch/arm/include/asm/v7m.h index 1fd775c1bc5d..5de776c81382 100644 --- a/arch/arm/include/asm/v7m.h +++ b/arch/arm/include/asm/v7m.h @@ -57,6 +57,16 @@ #define V7M_SCB_CCSIDR 0x80 /* Cache size ID register */ #define V7M_SCB_CSSELR 0x84 /* Cache size selection register */ +/* Memory-mapped MPU registers for M-class */ +#define MPU_TYPE 0x90 +#define MPU_CTRL 0x94 +#define MPU_CTRL_ENABLE 1 +#define MPU_CTRL_PRIVDEFENA (1 << 2) + +#define MPU_RNR 0x98 +#define MPU_RBAR 0x9c +#define MPU_RASR 0xa0 + /* Cache opeartions */ #define V7M_SCB_ICIALLU 0x250 /* I-cache invalidate all to PoU */ #define V7M_SCB_ICIMVAU 0x258 /* I-cache invalidate by MVA to PoU */ |