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authorOlof Johansson <olof@lixom.net>2018-12-03 13:09:38 -0800
committerOlof Johansson <olof@lixom.net>2018-12-03 13:09:38 -0800
commitac21e9af5a5cc7fe4c843ddf5bfefc9f71aa049b (patch)
tree2855853d40d788a3a3880a5259338cf28cfa693b /arch/arm/include/debug
parent3773b5c94e8a35565c99798c013043b92a49008f (diff)
parent12e0888de8d3bab92d219379d4226c7f9c306a91 (diff)
Merge tag 'arm-soc/for-4.21/soc' of https://github.com/Broadcom/stblinux into next/soc
This pull request contains Broadcom ARM-based SoCs machine files updates for 4.21, please pull the following: - Stefan switches relevant BCM283x files under arch/arm/mach-bcm to the SPDX license identifiers - Justin adds an entry in the Broadcom STB debug LL stub for 7255 - Florian enables reset controller support for BCM63xx SoCs * tag 'arm-soc/for-4.21/soc' of https://github.com/Broadcom/stblinux: ARM: mach-bcm: Switch bcm2835 and platsmp to SPDX identifier ARM: BCM63XX: Enable reset controller support ARM: brcmstb: Add entry for 7255 Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/include/debug')
-rw-r--r--arch/arm/include/debug/brcmstb.S24
1 files changed, 13 insertions, 11 deletions
diff --git a/arch/arm/include/debug/brcmstb.S b/arch/arm/include/debug/brcmstb.S
index 0f580caa81e5..bf8702ee8f86 100644
--- a/arch/arm/include/debug/brcmstb.S
+++ b/arch/arm/include/debug/brcmstb.S
@@ -26,8 +26,9 @@
#define UARTA_3390 REG_PHYS_ADDR(0x40a900)
#define UARTA_7250 REG_PHYS_ADDR(0x40b400)
-#define UARTA_7260 REG_PHYS_ADDR(0x40c000)
-#define UARTA_7268 UARTA_7260
+#define UARTA_7255 REG_PHYS_ADDR(0x40c000)
+#define UARTA_7260 UARTA_7255
+#define UARTA_7268 UARTA_7255
#define UARTA_7271 UARTA_7268
#define UARTA_7278 REG_PHYS_ADDR_V7(0x40c000)
#define UARTA_7364 REG_PHYS_ADDR(0x40b000)
@@ -82,15 +83,16 @@ ARM_BE8( rev \rv, \rv )
/* Chip specific detection starts here */
20: checkuart(\rp, \rv, 0x33900000, 3390)
21: checkuart(\rp, \rv, 0x72500000, 7250)
-22: checkuart(\rp, \rv, 0x72600000, 7260)
-23: checkuart(\rp, \rv, 0x72680000, 7268)
-24: checkuart(\rp, \rv, 0x72710000, 7271)
-25: checkuart(\rp, \rv, 0x73640000, 7364)
-26: checkuart(\rp, \rv, 0x73660000, 7366)
-27: checkuart(\rp, \rv, 0x07437100, 74371)
-28: checkuart(\rp, \rv, 0x74390000, 7439)
-29: checkuart(\rp, \rv, 0x74450000, 7445)
-30: checkuart(\rp, \rv, 0x72780000, 7278)
+22: checkuart(\rp, \rv, 0x72550000, 7255)
+23: checkuart(\rp, \rv, 0x72600000, 7260)
+24: checkuart(\rp, \rv, 0x72680000, 7268)
+25: checkuart(\rp, \rv, 0x72710000, 7271)
+26: checkuart(\rp, \rv, 0x72780000, 7278)
+27: checkuart(\rp, \rv, 0x73640000, 7364)
+28: checkuart(\rp, \rv, 0x73660000, 7366)
+29: checkuart(\rp, \rv, 0x07437100, 74371)
+30: checkuart(\rp, \rv, 0x74390000, 7439)
+31: checkuart(\rp, \rv, 0x74450000, 7445)
/* No valid UART found */
90: mov \rp, #0