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authorFlorian Fainelli <f.fainelli@gmail.com>2017-08-29 11:03:39 -0700
committerFlorian Fainelli <f.fainelli@gmail.com>2017-09-25 11:56:04 -0700
commitc14963521502b237a6817aceda6f3379296db75c (patch)
tree0f0be2a8ce40c9eff76a7226af8ab160b4ca87ef /arch/arm/include/debug
parentea023be7071c4e91bb7895aad26c8a52e52032e6 (diff)
ARM: brcmstb: Add appropriate ARM_BE8() macros for swapping
Building a big-endian kernel for ARCH_BRCMSTB revealed that we would not be correctly polling for the right bit in the busyuart macro, turns out there are a few transformations needed to work with big-endian kernels. First we need to swap the value we read from SUN_TOP_CTRL to properly compare it against our local tables. Then, just like 8250.S we need to swap the value before storing it, and conversely swap it after a load. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Diffstat (limited to 'arch/arm/include/debug')
-rw-r--r--arch/arm/include/debug/brcmstb.S3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/include/debug/brcmstb.S b/arch/arm/include/debug/brcmstb.S
index 52aaed2b936f..c826f15d2f80 100644
--- a/arch/arm/include/debug/brcmstb.S
+++ b/arch/arm/include/debug/brcmstb.S
@@ -58,6 +58,7 @@
/* Check SUN_TOP_CTRL base */
ldr \rp, =SUN_TOP_CTRL_BASE @ load SUN_TOP_CTRL PA
ldr \rv, [\rp, #0] @ get register contents
+ARM_BE8( rev \rv, \rv )
and \rv, \rv, #0xffffff00 @ strip revision bits [7:0]
/* Chip specific detection starts here */
@@ -98,11 +99,13 @@
.endm
.macro store, rd, rx:vararg
+ARM_BE8( rev \rd, \rd )
str \rd, \rx
.endm
.macro load, rd, rx:vararg
ldr \rd, \rx
+ARM_BE8( rev \rd, \rd )
.endm
.macro senduart,rd,rx