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authorLinus Torvalds <torvalds@linux-foundation.org>2016-10-07 21:18:42 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2016-10-07 21:18:42 -0700
commit66f2c6d9525baa7534640f09f406cd2987e0f287 (patch)
treec4874177b3dd0e2d0913cb0f898f74412f2801c1 /arch/arm/include
parenta771151a8323a5ca81f443a9a439851b8a872c85 (diff)
parente40454d3f444ba7f8cc78dd985a1414a5945757c (diff)
Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform updates from Arnd Bergmann: "These are updates for platform specific code on 32-bit ARM machines, essentially anything that can not (yet) be expressed using DT files. Noteworthy changes include: - We get support for running in big-endian mode on two platforms: sunxi (Allwinner) and s3c24xx (old Samsung). - The recently added Uniphier platform now uses standard PSCI methods for SMP booting and we remove support for old bootloader versions that did not support it yet. - In sunxi, we gain support for the "Nextthing GR8" SoC, which is a close relative of the Allwinner A13 and R8 chips. - PXA completes its move over to the generic dmaengine framework and removes its old private API - mach-bcm gains support for BCM47189/BCM53573, their first ARM SoC with integrated 802.11ac wireless networking" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (54 commits) ARM: imx legacy: pca100: move peripheral initialization to .init_late ARM: imx legacy: mx27ads: move peripheral initialization to .init_late ARM: imx legacy: mx21ads: move peripheral initialization to .init_late ARM: imx legacy: pcm043: move peripheral initialization to .init_late ARM: imx legacy: mx35-3ds: move peripheral initialization to .init_late ARM: imx legacy: mx27-3ds: move peripheral initialization to .init_late ARM: imx legacy: imx27-visstrim-m10: move peripheral initialization to .init_late ARM: imx legacy: vpr200: move peripheral initialization to .init_late ARM: imx legacy: mx31moboard: move peripheral initialization to .init_late ARM: imx legacy: armadillo5x0: move peripheral initialization to .init_late ARM: imx legacy: qong: move peripheral initialization to .init_late ARM: imx legacy: mx31-3ds: move peripheral initialization to .init_late ARM: imx legacy: pcm037: move peripheral initialization to .init_late ARM: imx legacy: mx31lilly: move peripheral initialization to .init_late ARM: imx legacy: mx31ads: move peripheral initialization to .init_late ARM: imx legacy: mx31lite: move peripheral initialization to .init_late ARM: imx legacy: kzm: move peripheral initialization to .init_late MAINTAINERS: update list of Oxnas maintainers ARM: orion5x: remove extraneous NO_IRQ ARM: orion: simplify orion_ge00_switch_init ...
Diffstat (limited to 'arch/arm/include')
-rw-r--r--arch/arm/include/asm/hardware/cache-uniphier.h20
-rw-r--r--arch/arm/include/debug/brcmstb.S145
2 files changed, 147 insertions, 18 deletions
diff --git a/arch/arm/include/asm/hardware/cache-uniphier.h b/arch/arm/include/asm/hardware/cache-uniphier.h
index 102e3fbe1e10..eaa60da7dac3 100644
--- a/arch/arm/include/asm/hardware/cache-uniphier.h
+++ b/arch/arm/include/asm/hardware/cache-uniphier.h
@@ -1,5 +1,6 @@
/*
- * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+ * Copyright (C) 2015-2016 Socionext Inc.
+ * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -19,28 +20,11 @@
#ifdef CONFIG_CACHE_UNIPHIER
int uniphier_cache_init(void);
-int uniphier_cache_l2_is_enabled(void);
-void uniphier_cache_l2_touch_range(unsigned long start, unsigned long end);
-void uniphier_cache_l2_set_locked_ways(u32 way_mask);
#else
static inline int uniphier_cache_init(void)
{
return -ENODEV;
}
-
-static inline int uniphier_cache_l2_is_enabled(void)
-{
- return 0;
-}
-
-static inline void uniphier_cache_l2_touch_range(unsigned long start,
- unsigned long end)
-{
-}
-
-static inline void uniphier_cache_l2_set_locked_ways(u32 way_mask)
-{
-}
#endif
#endif /* __CACHE_UNIPHIER_H */
diff --git a/arch/arm/include/debug/brcmstb.S b/arch/arm/include/debug/brcmstb.S
new file mode 100644
index 000000000000..9113d7b33ae0
--- /dev/null
+++ b/arch/arm/include/debug/brcmstb.S
@@ -0,0 +1,145 @@
+/*
+ * Copyright (C) 2016 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+#include <linux/serial_reg.h>
+
+/* Physical register offset and virtual register offset */
+#define REG_PHYS_BASE 0xf0000000
+#define REG_VIRT_BASE 0xfc000000
+#define REG_PHYS_ADDR(x) ((x) + REG_PHYS_BASE)
+
+/* Product id can be read from here */
+#define SUN_TOP_CTRL_BASE REG_PHYS_ADDR(0x404000)
+
+#define UARTA_3390 REG_PHYS_ADDR(0x40a900)
+#define UARTA_7250 REG_PHYS_ADDR(0x40b400)
+#define UARTA_7268 REG_PHYS_ADDR(0x40c000)
+#define UARTA_7271 UARTA_7268
+#define UARTA_7364 REG_PHYS_ADDR(0x40b000)
+#define UARTA_7366 UARTA_7364
+#define UARTA_74371 REG_PHYS_ADDR(0x406b00)
+#define UARTA_7439 REG_PHYS_ADDR(0x40a900)
+#define UARTA_7445 REG_PHYS_ADDR(0x40ab00)
+
+#define UART_SHIFT 2
+
+#define checkuart(rp, rv, family_id, family) \
+ /* Load family id */ \
+ ldr rp, =family_id ; \
+ /* Compare SUN_TOP_CTRL value against it */ \
+ cmp rp, rv ; \
+ /* Passed test, load address */ \
+ ldreq rp, =UARTA_##family ; \
+ /* Jump to save UART address */ \
+ beq 91f
+
+ .macro addruart, rp, rv, tmp
+ adr \rp, 99f @ actual addr of 99f
+ ldr \rv, [\rp] @ linked addr is stored there
+ sub \rv, \rv, \rp @ offset between the two
+ ldr \rp, [\rp, #4] @ linked brcmstb_uart_config
+ sub \tmp, \rp, \rv @ actual brcmstb_uart_config
+ ldr \rp, [\tmp] @ Load brcmstb_uart_config
+ cmp \rp, #1 @ needs initialization?
+ bne 100f @ no; go load the addresses
+ mov \rv, #0 @ yes; record init is done
+ str \rv, [\tmp]
+
+ /* Check SUN_TOP_CTRL base */
+ ldr \rp, =SUN_TOP_CTRL_BASE @ load SUN_TOP_CTRL PA
+ ldr \rv, [\rp, #0] @ get register contents
+ and \rv, \rv, #0xffffff00 @ strip revision bits [7:0]
+
+ /* Chip specific detection starts here */
+20: checkuart(\rp, \rv, 0x33900000, 3390)
+21: checkuart(\rp, \rv, 0x72500000, 7250)
+22: checkuart(\rp, \rv, 0x72680000, 7268)
+23: checkuart(\rp, \rv, 0x72710000, 7271)
+24: checkuart(\rp, \rv, 0x73640000, 7364)
+25: checkuart(\rp, \rv, 0x73660000, 7366)
+26: checkuart(\rp, \rv, 0x07437100, 74371)
+27: checkuart(\rp, \rv, 0x74390000, 7439)
+28: checkuart(\rp, \rv, 0x74450000, 7445)
+
+ /* No valid UART found */
+90: mov \rp, #0
+ /* fall through */
+
+ /* Record whichever UART we chose */
+91: str \rp, [\tmp, #4] @ Store in brcmstb_uart_phys
+ cmp \rp, #0 @ Valid UART address?
+ bne 92f @ Yes, go process it
+ str \rp, [\tmp, #8] @ Store 0 in brcmstb_uart_virt
+ b 100f @ Done
+92: and \rv, \rp, #0xffffff @ offset within 16MB section
+ add \rv, \rv, #REG_VIRT_BASE
+ str \rv, [\tmp, #8] @ Store in brcmstb_uart_virt
+ b 100f
+
+ .align
+99: .word .
+ .word brcmstb_uart_config
+ .ltorg
+
+ /* Load previously selected UART address */
+100: ldr \rp, [\tmp, #4] @ Load brcmstb_uart_phys
+ ldr \rv, [\tmp, #8] @ Load brcmstb_uart_virt
+ .endm
+
+ .macro store, rd, rx:vararg
+ str \rd, \rx
+ .endm
+
+ .macro load, rd, rx:vararg
+ ldr \rd, \rx
+ .endm
+
+ .macro senduart,rd,rx
+ store \rd, [\rx, #UART_TX << UART_SHIFT]
+ .endm
+
+ .macro busyuart,rd,rx
+1002: load \rd, [\rx, #UART_LSR << UART_SHIFT]
+ and \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE
+ teq \rd, #UART_LSR_TEMT | UART_LSR_THRE
+ bne 1002b
+ .endm
+
+ .macro waituart,rd,rx
+ .endm
+
+/*
+ * Storage for the state maintained by the macros above.
+ *
+ * In the kernel proper, this data is located in arch/arm/mach-bcm/brcmstb.c.
+ * That's because this header is included from multiple files, and we only
+ * want a single copy of the data. In particular, the UART probing code above
+ * assumes it's running using physical addresses. This is true when this file
+ * is included from head.o, but not when included from debug.o. So we need
+ * to share the probe results between the two copies, rather than having
+ * to re-run the probing again later.
+ *
+ * In the decompressor, we put the symbol/storage right here, since common.c
+ * isn't included in the decompressor build. This symbol gets put in .text
+ * even though it's really data, since .data is discarded from the
+ * decompressor. Luckily, .text is writeable in the decompressor, unless
+ * CONFIG_ZBOOT_ROM. That dependency is handled in arch/arm/Kconfig.debug.
+ */
+#if defined(ZIMAGE)
+brcmstb_uart_config:
+ /* Debug UART initialization required */
+ .word 1
+ /* Debug UART physical address */
+ .word 0
+ /* Debug UART virtual address */
+ .word 0
+#endif