diff options
| author | Ard Biesheuvel <ardb@kernel.org> | 2022-04-20 09:57:45 +0100 |
|---|---|---|
| committer | Russell King (Oracle) <rmk+kernel@armlinux.org.uk> | 2022-05-20 12:33:47 +0100 |
| commit | 892c608a7d7380b9a7c8f0d6aab99b763fd6fd3f (patch) | |
| tree | 2414479effffccb130956bc04d7505d42625d0e6 /arch/arm/kernel/entry-armv.S | |
| parent | c4f486f1e7b34b27ec578494a236061b337d50ae (diff) | |
ARM: 9199/1: spectre-bhb: use local DSB and elide ISB in loop8 sequence
The loop8 mitigation for Spectre-BHB only requires a CPU local DSB
rather than a systemwide one, which is much more costly. And by the same
reasoning as why it is justified to omit the ISB after BPIALL, we can
also elide the ISB and rely on the exception return for the context
synchronization.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Diffstat (limited to 'arch/arm/kernel/entry-armv.S')
| -rw-r--r-- | arch/arm/kernel/entry-armv.S | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S index 87cb06316aca..43ab77553e84 100644 --- a/arch/arm/kernel/entry-armv.S +++ b/arch/arm/kernel/entry-armv.S @@ -1131,8 +1131,9 @@ vector_bhb_loop8_\name: 3: W(b) . + 4 subs r0, r0, #1 bne 3b - dsb - isb + dsb nsh + @ isb not needed due to "movs pc, lr" in the vector stub + @ which gives a "context synchronisation". b 2b ENDPROC(vector_bhb_loop8_\name) .previous |