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authorArd Biesheuvel <ardb@kernel.org>2021-09-18 10:44:36 +0200
committerArd Biesheuvel <ardb@kernel.org>2021-09-27 16:54:02 +0200
commit3855ab614df4818c833864572559a97fd9f9a299 (patch)
treeb20a006393d34ca2b1905054928bcc9f9dce6d16 /arch/arm/kernel/entry-header.S
parent19f29aebd929c31c5cc901f38a9295617b602c38 (diff)
ARM: smp: Free up the TLS register while running in the kernel
To prepare for a subsequent patch that stores the current task pointer in the user space TLS register while running in the kernel, modify the set_tls and switch_tls routines not to touch the register directly, and update the return to user space code to load the correct value. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Amit Daniel Kachhap <amit.kachhap@arm.com>
Diffstat (limited to 'arch/arm/kernel/entry-header.S')
-rw-r--r--arch/arm/kernel/entry-header.S8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/kernel/entry-header.S b/arch/arm/kernel/entry-header.S
index 40db0f9188b6..ae24dd54e9ef 100644
--- a/arch/arm/kernel/entry-header.S
+++ b/arch/arm/kernel/entry-header.S
@@ -292,6 +292,14 @@
.macro restore_user_regs, fast = 0, offset = 0
+#if defined(CONFIG_CPU_32v6K) && !defined(CONFIG_CPU_V6)
+ @ The TLS register update is deferred until return to user space so we
+ @ can use it for other things while running in the kernel
+ get_thread_info r1
+ ldr r1, [r1, #TI_TP_VALUE]
+ mcr p15, 0, r1, c13, c0, 3 @ set TLS register
+#endif
+
uaccess_enable r1, isb=0
#ifndef CONFIG_THUMB2_KERNEL
@ ARM mode restore