diff options
| author | Marc Zyngier <marc.zyngier@arm.com> | 2014-01-22 10:20:09 +0000 |
|---|---|---|
| committer | Marc Zyngier <marc.zyngier@arm.com> | 2014-03-03 01:15:24 +0000 |
| commit | af20814ee927ed888288d98917a766b4179c4fe0 (patch) | |
| tree | d8b2dea94adc055c7a9fc351b94a72960ccc0cc9 /arch/arm/kvm/coproc.c | |
| parent | ac30a11e8e92a03dbe236b285c5cbae0bf563141 (diff) | |
ARM: KVM: add world-switch for AMAIR{0,1}
HCR.TVM traps (among other things) accesses to AMAIR0 and AMAIR1.
In order to minimise the amount of surprise a guest could generate by
trying to access these registers with caches off, add them to the
list of registers we switch/handle.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm/kvm/coproc.c')
| -rw-r--r-- | arch/arm/kvm/coproc.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/kvm/coproc.c b/arch/arm/kvm/coproc.c index 126c90d18387..a5a54a48d51b 100644 --- a/arch/arm/kvm/coproc.c +++ b/arch/arm/kvm/coproc.c @@ -328,6 +328,12 @@ static const struct coproc_reg cp15_regs[] = { { CRn(10), CRm( 2), Op1( 0), Op2( 1), is32, NULL, reset_unknown, c10_NMRR}, + /* AMAIR0/AMAIR1: swapped by interrupt.S. */ + { CRn(10), CRm( 3), Op1( 0), Op2( 0), is32, + access_vm_reg, reset_unknown, c10_AMAIR0}, + { CRn(10), CRm( 3), Op1( 0), Op2( 1), is32, + access_vm_reg, reset_unknown, c10_AMAIR1}, + /* VBAR: swapped by interrupt.S. */ { CRn(12), CRm( 0), Op1( 0), Op2( 0), is32, NULL, reset_val, c12_VBAR, 0x00000000 }, |