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author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-01-30 08:29:05 -0800 |
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committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-01-30 08:29:05 -0800 |
commit | c9cc8e771cb62e495765793e4b7d06016ae1b525 (patch) | |
tree | 42c3ae364cd8b22e3263403f0baa2b5e8070b5da /arch/arm/mach-at91rm9200/gpio.c | |
parent | 59df3230fc57fa8900bebf3d2d68221d549f3c7c (diff) | |
parent | b9d1902cd281d9b829fb3d6ee9148d28c8c63382 (diff) |
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm:
[ARM] 4117/1: S3C2412: Fix writel() usage in selection code
[ARM] 4111/1: Allow VFP to work with thread migration on SMP
[ARM] 4112/1: Only ioremap to supersections if DOMAIN_IO is zero
[ARM] 4106/1: S3C2410: typo fixes in register definitions
[ARM] 4102/1: Allow for PHYS_OFFSET on any valid 2MiB address
[ARM] Fix AMBA serial drivers for non-first serial ports
[ARM] 4100/1: iop3xx: fix cpu mask for iop333
[ARM] Update mach-types
[ARM] Fix show_mem() for discontigmem
[ARM] 4096/1: S3C24XX: change return code form s3c2410_gpio_getcfg()
[ARM] 4095/1: S3C24XX: Fix GPIO set for Bank A
[ARM] 4092/1: i.MX/MX1 CPU Frequency scaling latency definition
[ARM] 4089/1: AT91: GPIO wake IRQ cleanup
[ARM] 4088/1: AT91: Unbalanced IRQ in serial driver suspend/resume
[ARM] 4087/1: AT91: CPU reset for SAM9x processors
[ARM] 4086/1: AT91: Whitespace cleanup
[ARM] 4085/1: AT91: Header fixes.
[ARM] 4084/1: Remove CONFIG_DEBUG_WAITQ
Diffstat (limited to 'arch/arm/mach-at91rm9200/gpio.c')
-rw-r--r-- | arch/arm/mach-at91rm9200/gpio.c | 39 |
1 files changed, 13 insertions, 26 deletions
diff --git a/arch/arm/mach-at91rm9200/gpio.c b/arch/arm/mach-at91rm9200/gpio.c index 3f188508c391..af22659c8a28 100644 --- a/arch/arm/mach-at91rm9200/gpio.c +++ b/arch/arm/mach-at91rm9200/gpio.c @@ -20,7 +20,6 @@ #include <asm/io.h> #include <asm/hardware.h> #include <asm/arch/at91_pio.h> -#include <asm/arch/at91_pmc.h> #include <asm/arch/gpio.h> #include "generic.h" @@ -224,17 +223,17 @@ static u32 backups[MAX_GPIO_BANKS]; static int gpio_irq_set_wake(unsigned pin, unsigned state) { unsigned mask = pin_to_mask(pin); + unsigned bank = (pin - PIN_BASE) / 32; - pin -= PIN_BASE; - pin /= 32; - - if (unlikely(pin >= MAX_GPIO_BANKS)) + if (unlikely(bank >= MAX_GPIO_BANKS)) return -EINVAL; if (state) - wakeups[pin] |= mask; + wakeups[bank] |= mask; else - wakeups[pin] &= ~mask; + wakeups[bank] &= ~mask; + + set_irq_wake(gpio[bank].id, state); return 0; } @@ -246,29 +245,15 @@ void at91_gpio_suspend(void) for (i = 0; i < gpio_banks; i++) { u32 pio = gpio[i].offset; - /* - * Note: drivers should have disabled GPIO interrupts that - * aren't supposed to be wakeup sources. - * But that is not much good on ARM..... disable_irq() does - * not update the hardware immediately, so the hardware mask - * (IMR) has the wrong value (not current, too much is - * permitted). - * - * Our workaround is to disable all non-wakeup IRQs ... - * which is exactly what correct drivers asked for in the - * first place! - */ backups[i] = at91_sys_read(pio + PIO_IMR); at91_sys_write(pio + PIO_IDR, backups[i]); at91_sys_write(pio + PIO_IER, wakeups[i]); - if (!wakeups[i]) { - disable_irq_wake(gpio[i].id); - at91_sys_write(AT91_PMC_PCDR, 1 << gpio[i].id); - } else { - enable_irq_wake(gpio[i].id); + if (!wakeups[i]) + clk_disable(gpio[i].clock); + else { #ifdef CONFIG_PM_DEBUG - printk(KERN_DEBUG "GPIO-%c may wake for %08x\n", "ABCD"[i], wakeups[i]); + printk(KERN_DEBUG "GPIO-%c may wake for %08x\n", 'A'+i, wakeups[i]); #endif } } @@ -281,9 +266,11 @@ void at91_gpio_resume(void) for (i = 0; i < gpio_banks; i++) { u32 pio = gpio[i].offset; + if (!wakeups[i]) + clk_enable(gpio[i].clock); + at91_sys_write(pio + PIO_IDR, wakeups[i]); at91_sys_write(pio + PIO_IER, backups[i]); - at91_sys_write(AT91_PMC_PCER, 1 << gpio[i].id); } } |