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authorAlexander Shiyan <shc_work@mail.ru>2013-05-13 21:07:27 +0400
committerOlof Johansson <olof@lixom.net>2013-06-11 15:47:23 -0700
commitd29268ceb8f500be5fa4636b1335c974250c0f34 (patch)
tree5aa6c989321458811478e86d830597ab397f2bda /arch/arm/mach-clps711x
parent3f0bcaa5e91d0752ccaf2d8d6aa1514dae5e8264 (diff)
ARM: clps711x: autcpu12: Special driver for handling memory is removed
This patch provide migration to using "mtd-ram" driver instead of using special driver for handling NVRAM memory. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/mach-clps711x')
-rw-r--r--arch/arm/mach-clps711x/board-autcpu12.c68
-rw-r--r--arch/arm/mach-clps711x/include/mach/autcpu12.h2
2 files changed, 56 insertions, 14 deletions
diff --git a/arch/arm/mach-clps711x/board-autcpu12.c b/arch/arm/mach-clps711x/board-autcpu12.c
index 3e22d0b1a9c5..91a3ab50fc20 100644
--- a/arch/arm/mach-clps711x/board-autcpu12.c
+++ b/arch/arm/mach-clps711x/board-autcpu12.c
@@ -27,6 +27,7 @@
#include <linux/ioport.h>
#include <linux/interrupt.h>
#include <linux/mtd/physmap.h>
+#include <linux/mtd/plat-ram.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/nand-gpio.h>
#include <linux/platform_device.h>
@@ -49,6 +50,9 @@
/* NOR flash */
#define AUTCPU12_FLASH_BASE (CS0_PHYS_BASE)
+/* NVRAM */
+#define AUTCPU12_NVRAM_BASE (CS1_PHYS_BASE + 0x02000000)
+
/* SmartMedia flash */
#define AUTCPU12_SMC_BASE (CS1_PHYS_BASE + 0x06000000)
#define AUTCPU12_SMC_SEL_BASE (AUTCPU12_SMC_BASE + 0x10)
@@ -74,17 +78,6 @@ static struct resource autcpu12_cs8900_resource[] __initdata = {
DEFINE_RES_IRQ(AUTCPU12_CS8900_IRQ),
};
-static struct resource autcpu12_nvram_resource[] __initdata = {
- DEFINE_RES_MEM_NAMED(AUTCPU12_PHYS_NVRAM, SZ_128K, "SRAM"),
-};
-
-static struct platform_device autcpu12_nvram_pdev __initdata = {
- .name = "autcpu12_nvram",
- .id = -1,
- .resource = autcpu12_nvram_resource,
- .num_resources = ARRAY_SIZE(autcpu12_nvram_resource),
-};
-
static struct resource autcpu12_nand_resource[] __initdata = {
DEFINE_RES_MEM(AUTCPU12_SMC_BASE, SZ_16),
};
@@ -194,6 +187,57 @@ static struct platform_device autcpu12_flash_pdev __initdata = {
},
};
+static struct resource autcpu12_nvram_resource[] __initdata = {
+ DEFINE_RES_MEM(AUTCPU12_NVRAM_BASE, 0),
+};
+
+static struct platdata_mtd_ram autcpu12_nvram_pdata = {
+ .bankwidth = 4,
+};
+
+static struct platform_device autcpu12_nvram_pdev __initdata = {
+ .name = "mtd-ram",
+ .id = 0,
+ .resource = autcpu12_nvram_resource,
+ .num_resources = ARRAY_SIZE(autcpu12_nvram_resource),
+ .dev = {
+ .platform_data = &autcpu12_nvram_pdata,
+ },
+};
+
+static void __init autcpu12_nvram_init(void)
+{
+ void __iomem *nvram;
+ unsigned int save[2];
+ resource_size_t nvram_size = SZ_128K;
+
+ /*
+ * Check for 32K/128K
+ * Read ofs 0K
+ * Read ofs 64K
+ * Write complement to ofs 64K
+ * Read and check result on ofs 0K
+ * Restore contents
+ */
+ nvram = ioremap(autcpu12_nvram_resource[0].start, SZ_128K);
+ if (nvram) {
+ save[0] = readl(nvram + 0);
+ save[1] = readl(nvram + SZ_64K);
+ writel(~save[0], nvram + SZ_64K);
+ if (readl(nvram + 0) != save[0]) {
+ writel(save[0], nvram + 0);
+ nvram_size = SZ_32K;
+ } else
+ writel(save[1], nvram + SZ_64K);
+ iounmap(nvram);
+
+ autcpu12_nvram_resource[0].end =
+ autcpu12_nvram_resource[0].start + nvram_size - 1;
+ platform_device_register(&autcpu12_nvram_pdev);
+ } else
+ pr_err("Failed to remap NVRAM resource\n");
+}
+
static void __init autcpu12_init(void)
{
clps711x_devices_init();
@@ -202,7 +246,7 @@ static void __init autcpu12_init(void)
platform_device_register_simple("cs89x0", 0, autcpu12_cs8900_resource,
ARRAY_SIZE(autcpu12_cs8900_resource));
platform_device_register(&autcpu12_mmgpio_pdev);
- platform_device_register(&autcpu12_nvram_pdev);
+ autcpu12_nvram_init();
}
static void __init autcpu12_init_late(void)
diff --git a/arch/arm/mach-clps711x/include/mach/autcpu12.h b/arch/arm/mach-clps711x/include/mach/autcpu12.h
index 0db6f1869f01..0e00148d46a3 100644
--- a/arch/arm/mach-clps711x/include/mach/autcpu12.h
+++ b/arch/arm/mach-clps711x/include/mach/autcpu12.h
@@ -31,8 +31,6 @@
*/
#define AUTCPU12_PHYS_CHAR_LCD CS1_PHYS_BASE +0x00000000 /* physical */
-#define AUTCPU12_PHYS_NVRAM CS1_PHYS_BASE +0x02000000 /* physical */
-
#define AUTCPU12_PHYS_CSAUX1 CS1_PHYS_BASE +0x04000000 /* physical */
#define AUTCPU12_PHYS_CAN CS1_PHYS_BASE +0x08000000 /* physical */