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authorOlof Johansson <olof@lixom.net>2014-05-21 22:16:30 -0700
committerOlof Johansson <olof@lixom.net>2014-05-21 22:16:30 -0700
commit3bc4a87c03e75c88471450380cb194bf30ea4a87 (patch)
tree8e757ceeeeddf927ce5feda60154962f745547ee /arch/arm/mach-exynos/firmware.c
parent4b660a7f5c8099d88d1a43d8ae138965112592c7 (diff)
parent702b691e4a711e699cf3cccba879c1d945665c0d (diff)
Merge tag 'samsung-fixes' of http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into fixes
Samsung fixes for 3.15 from Kukjin Kim: - Remove g2d_pd and mau_pd nodes on exynos5420. Since the power domains are linked to the CMU blocks, kernel panic happens during access clocks when the power domains are disabled. Now this is a best solution. - Enable HS-I2C on exynos5 by default MMC partition cannot be mounted for RFS without the enabling HS-I2C because regulators for MMC power are connected to HS-I2C bus. - Disable MDMA1 node on exynos5420 When MDMA1 runs in secure mode it makes kernel fault, so need to disalbe it on exynos5420 by default instead of each board. - Fix the secondary CPU boot for exynos4212 * tag 'samsung-fixes' of http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: dts: Remove g2d_pd node for exynos5420 ARM: dts: Remove mau_pd node for exynos5420 ARM: exynos_defconfig: enable HS-I2C to fix for mmc partition mount ARM: dts: disable MDMA1 node for exynos5420 ARM: EXYNOS: fix the secondary CPU boot of exynos4212 Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/mach-exynos/firmware.c')
-rw-r--r--arch/arm/mach-exynos/firmware.c15
1 files changed, 14 insertions, 1 deletions
diff --git a/arch/arm/mach-exynos/firmware.c b/arch/arm/mach-exynos/firmware.c
index 932129ef26c6..aa01c4222b40 100644
--- a/arch/arm/mach-exynos/firmware.c
+++ b/arch/arm/mach-exynos/firmware.c
@@ -18,6 +18,8 @@
#include <mach/map.h>
+#include <plat/cpu.h>
+
#include "smc.h"
static int exynos_do_idle(void)
@@ -28,13 +30,24 @@ static int exynos_do_idle(void)
static int exynos_cpu_boot(int cpu)
{
+ /*
+ * The second parameter of SMC_CMD_CPU1BOOT command means CPU id.
+ * But, Exynos4212 has only one secondary CPU so second parameter
+ * isn't used for informing secure firmware about CPU id.
+ */
+ if (soc_is_exynos4212())
+ cpu = 0;
+
exynos_smc(SMC_CMD_CPU1BOOT, cpu, 0, 0);
return 0;
}
static int exynos_set_cpu_boot_addr(int cpu, unsigned long boot_addr)
{
- void __iomem *boot_reg = S5P_VA_SYSRAM_NS + 0x1c + 4*cpu;
+ void __iomem *boot_reg = S5P_VA_SYSRAM_NS + 0x1c;
+
+ if (!soc_is_exynos4212())
+ boot_reg += 4*cpu;
__raw_writel(boot_addr, boot_reg);
return 0;