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authorLinus Torvalds <torvalds@linux-foundation.org>2017-09-12 06:10:44 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2017-09-12 06:10:44 -0700
commit8fac2f96ab86b0e14ec4e42851e21e9b518bdc55 (patch)
treef7d45eb60cf6075f90263d9d2eaa796ce6c616b6 /arch/arm/mach-exynos
parent260d16580db018e3faeb1992c70c13bf00e726b8 (diff)
parente558bdc21ae1f0db520eccd84015e17d8a589973 (diff)
Merge branch 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm
Pull ARM updates from Russell King: "Low priority fixes and updates for ARM: - add some missing includes - efficiency improvements in system call entry code when tracing is enabled - ensure ARMv6+ is always built as EABI - export save_stack_trace_tsk() - fix fatal signal handling during mm fault - build translation table base address register from scratch - appropriately align the .data section to a word boundary where we rely on that data being word aligned" * 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm: ARM: 8691/1: Export save_stack_trace_tsk() ARM: 8692/1: mm: abort uaccess retries upon fatal signal ARM: 8690/1: lpae: build TTB control register value from scratch in v7_ttb_setup ARM: align .data section ARM: always enable AEABI for ARMv6+ ARM: avoid saving and restoring registers unnecessarily ARM: move PC value into r9 ARM: obtain thread info structure later ARM: use aliases for registers in entry-common ARM: 8689/1: scu: add missing errno include ARM: 8688/1: pm: add missing types include
Diffstat (limited to 'arch/arm/mach-exynos')
-rw-r--r--arch/arm/mach-exynos/sleep.S1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-exynos/sleep.S b/arch/arm/mach-exynos/sleep.S
index cf950790fbdc..4292cae43f3c 100644
--- a/arch/arm/mach-exynos/sleep.S
+++ b/arch/arm/mach-exynos/sleep.S
@@ -124,6 +124,7 @@ _cp15_save_diag:
#endif /* CONFIG_CACHE_L2X0 */
.data
+ .align 2
.globl cp15_save_diag
cp15_save_diag:
.long 0 @ cp15 diagnostic