diff options
| author | Arnd Bergmann <arnd@arndb.de> | 2012-01-07 11:51:28 +0000 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2012-01-07 11:51:28 +0000 |
| commit | 40ba95fdf158713377d47736b1b3a9d75f4f2515 (patch) | |
| tree | 17a3216542d1107f777fd82577c91aebbce597d6 /arch/arm/mach-footbridge/common.c | |
| parent | 70d84a6431d732cbc4e68e72b6890cdd3865d43d (diff) | |
| parent | 0575fb754dbfc32a01f297e778533340a533ec68 (diff) | |
Merge branch 'depends/rmk/restart' into next/cleanup
Conflicts:
arch/arm/mach-at91/at91cap9.c
arch/arm/mach-at91/at91sam9260.c
arch/arm/mach-at91/at91sam9261.c
arch/arm/mach-at91/at91sam9263.c
arch/arm/mach-at91/at91sam9g45.c
arch/arm/mach-at91/at91sam9rl.c
arch/arm/mach-exynos/cpu.c
arch/arm/mach-shmobile/board-kota2.c
This resolves a bunch of conflicts between the arm-soc tree
and changes from the arm tree that have gone upstream.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-footbridge/common.c')
| -rw-r--r-- | arch/arm/mach-footbridge/common.c | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/arch/arm/mach-footbridge/common.c b/arch/arm/mach-footbridge/common.c index 38a44f9b9da2..41978ee4f9d0 100644 --- a/arch/arm/mach-footbridge/common.c +++ b/arch/arm/mach-footbridge/common.c @@ -199,6 +199,33 @@ void __init footbridge_map_io(void) iotable_init(ebsa285_host_io_desc, ARRAY_SIZE(ebsa285_host_io_desc)); } +void footbridge_restart(char mode, const char *cmd) +{ + if (mode == 's') { + /* Jump into the ROM */ + soft_restart(0x41000000); + } else { + /* + * Force the watchdog to do a CPU reset. + * + * After making sure that the watchdog is disabled + * (so we can change the timer registers) we first + * enable the timer to autoreload itself. Next, the + * timer interval is set really short and any + * current interrupt request is cleared (so we can + * see an edge transition). Finally, TIMER4 is + * enabled as the watchdog. + */ + *CSR_SA110_CNTL &= ~(1 << 13); + *CSR_TIMER4_CNTL = TIMER_CNTL_ENABLE | + TIMER_CNTL_AUTORELOAD | + TIMER_CNTL_DIV16; + *CSR_TIMER4_LOAD = 0x2; + *CSR_TIMER4_CLR = 0; + *CSR_SA110_CNTL |= (1 << 13); + } +} + #ifdef CONFIG_FOOTBRIDGE_ADDIN static inline unsigned long fb_bus_sdram_offset(void) |