Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC platform updates from Arnd Bergmann:
 "This release brings up a new platform based on the old ARM9 core: the
  Nuvoton NPCM is used as a baseboard management controller, competing
  with the better known ASpeed AST2xx series.

  Another important change is the addition of ARMv7-A based chips in
  mach-stm32. The older parts in this platform are ARMv7-M based
  microcontrollers, now they are expanding to general-purpose workloads.

  The other changes are the usual defconfig updates to enable additional
  drivers, lesser bugfixes. The largest updates as often are the ongoing
  OMAP cleanups, but we also have a number of changes for the older PXA
  and davinci platforms this time.

  For the Renesas shmobile/r-car platform, some new infrastructure is
  needed to make the watchdog work correctly.

  Supporting Multiprocessing on Allwinner A80 required a significant
  amount of new code, but is not doing anything unexpected"

* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (179 commits)
  arm: npcm: modify configuration for the NPCM7xx BMC.
  MAINTAINERS: update entry for ARM/berlin
  ARM: omap2: fix am43xx build without L2X0
  ARM: davinci: da8xx: simplify CFGCHIP regmap_config
  ARM: davinci: da8xx: fix oops in USB PHY driver due to stack allocated platform_data
  ARM: multi_v7_defconfig: add NXP FlexCAN IP support
  ARM: multi_v7_defconfig: enable thermal driver for i.MX devices
  ARM: multi_v7_defconfig: add RN5T618 PMIC family support
  ARM: multi_v7_defconfig: add NXP graphics drivers
  ARM: multi_v7_defconfig: add GPMI NAND controller support
  ARM: multi_v7_defconfig: add OCOTP driver for NXP SoCs
  ARM: multi_v7_defconfig: configure I2C driver built-in
  arm64: defconfig: add CONFIG_UNIPHIER_THERMAL and CONFIG_SNI_AVE
  ARM: imx: fix imx6sll-only build
  ARM: imx: select ARM_CPU_SUSPEND for CPU_IDLE as well
  ARM: mxs_defconfig: Re-sync defconfig
  ARM: imx_v4_v5_defconfig: Use the generic fsl-asoc-card driver
  ARM: imx_v4_v5_defconfig: Re-sync defconfig
  arm64: defconfig: enable stmmac ethernet to defconfig
  ARM: EXYNOS: Simplify code in coupled CPU idle hot path
  ...

1 files changed, 19 insertions, 37 deletions

diff --git a/arch/arm/mach-imx/anatop.c b/arch/arm/mach-imx/anatop.c
index 649a84c251ad..61f3d94f1633 100644
--- a/arch/arm/mach-imx/anatop.c
+++ b/arch/arm/mach-imx/anatop.c
@@ -1,5 +1,6 @@
 /*
  * Copyright (C) 2013-2015 Freescale Semiconductor, Inc.
+ * Copyright 2017-2018 NXP.
  *
  * The code contained herein is licensed under the GNU General Public
  * License. You may obtain a copy of the GNU General Public License
@@ -116,6 +117,7 @@ void __init imx_init_revision_from_anatop(void)
 	unsigned int revision;
 	u32 digprog;
 	u16 offset = ANADIG_DIGPROG;
+	u8 major_part, minor_part;
 
 	np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-anatop");
 	anatop_base = of_iomap(np, 0);
@@ -127,45 +129,25 @@ void __init imx_init_revision_from_anatop(void)
 	digprog = readl_relaxed(anatop_base + offset);
 	iounmap(anatop_base);
 
-	switch (digprog & 0xff) {
-	case 0:
-		/*
-		 * For i.MX6QP, most of the code for i.MX6Q can be resued,
-		 * so internally, we identify it as i.MX6Q Rev 2.0
-		 */
-		if (digprog >> 8 & 0x01)
-			revision = IMX_CHIP_REVISION_2_0;
-		else
-			revision = IMX_CHIP_REVISION_1_0;
-		break;
-	case 1:
-		revision = IMX_CHIP_REVISION_1_1;
-		break;
-	case 2:
-		revision = IMX_CHIP_REVISION_1_2;
-		break;
-	case 3:
-		revision = IMX_CHIP_REVISION_1_3;
-		break;
-	case 4:
-		revision = IMX_CHIP_REVISION_1_4;
-		break;
-	case 5:
-		/*
-		 * i.MX6DQ TO1.5 is defined as Rev 1.3 in Data Sheet, marked
-		 * as 'D' in Part Number last character.
-		 */
-		revision = IMX_CHIP_REVISION_1_5;
-		break;
-	default:
+	/*
+	 * On i.MX7D digprog value match linux version format, so
+	 * it needn't map again and we can use register value directly.
+	 */
+	if (of_device_is_compatible(np, "fsl,imx7d-anatop")) {
+		revision = digprog & 0xff;
+	} else {
 		/*
-		 * Fail back to return raw register value instead of 0xff.
-		 * It will be easy to know version information in SOC if it
-		 * can't be recognized by known version. And some chip's (i.MX7D)
-		 * digprog value match linux version format, so it needn't map
-		 * again and we can use register value directly.
+		 * MAJOR: [15:8], the major silicon revison;
+		 * MINOR: [7: 0], the minor silicon revison;
+		 *
+		 * please refer to the i.MX RM for the detailed
+		 * silicon revison bit define.
+		 * format the major part and minor part to match the
+		 * linux kernel soc version format.
 		 */
-		revision = digprog & 0xff;
+		major_part = (digprog >> 8) & 0xf;
+		minor_part = digprog & 0xf;
+		revision = ((major_part + 1) << 4) | minor_part;
 	}
 
 	mxc_set_cpu_type(digprog >> 16 & 0xff);