diff options
author | Max Filippov <jcmvbkbc@gmail.com> | 2018-08-10 20:43:48 -0700 |
---|---|---|
committer | Max Filippov <jcmvbkbc@gmail.com> | 2018-08-13 20:07:54 -0700 |
commit | be75de25251f7cf3e399ca1f584716a95510d24a (patch) | |
tree | 3d37e862f06ea42c80d1b8e33d5580590e84ffd7 /arch/arm/mach-omap2/common-board-devices.h | |
parent | 1ffaddd029c867d134a1dde39f540dcc8c52e274 (diff) |
xtensa: limit offsets in __loop_cache_{all,page}
When building kernel for xtensa cores with big cache lines (e.g. 128
bytes or more) __loop_cache_all and __loop_cache_page may generate
assembly instructions with immediate fields that are too big. This
results in the following build errors:
arch/xtensa/mm/misc.S: Assembler messages:
arch/xtensa/mm/misc.S:464: Error: operand 2 of 'diwbi' has invalid value '256'
arch/xtensa/mm/misc.S:464: Error: operand 2 of 'diwbi' has invalid value '384'
arch/xtensa/kernel/head.S: Assembler messages:
arch/xtensa/kernel/head.S:172: Error: operand 2 of 'diu' has invalid value '256'
arch/xtensa/kernel/head.S:172: Error: operand 2 of 'diu' has invalid value '384'
arch/xtensa/kernel/head.S:176: Error: operand 2 of 'iiu' has invalid value '256'
arch/xtensa/kernel/head.S:176: Error: operand 2 of 'iiu' has invalid value '384'
arch/xtensa/kernel/head.S:255: Error: operand 2 of 'diwb' has invalid value '256'
arch/xtensa/kernel/head.S:255: Error: operand 2 of 'diwb' has invalid value '384'
Add parameter max_immed to these macros and use it to limit values of
immediate operands. Extract common code of these macros into the new
macro __loop_cache_unroll.
Cc: stable@vger.kernel.org
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'arch/arm/mach-omap2/common-board-devices.h')
0 files changed, 0 insertions, 0 deletions