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authorTony Lindgren <tony@atomide.com>2019-08-26 08:47:07 -0700
committerTony Lindgren <tony@atomide.com>2019-08-26 08:47:07 -0700
commit1b95c5a48f5ea3a23618b5894f44124bfa98171a (patch)
tree2289f9bf25f82c2620f77a69c7d87010036512b4 /arch/arm/mach-omap2/omap_hwmod_44xx_data.c
parent7edd00f71f4b91ca31dbfa08926495fe5e77aab4 (diff)
ARM: OMAP2+: Drop legacy platform data for omap4 gpu
I've tested that the interconnect target module enables and idles just fine when probed with ti-sysc with PM runtime control via sys: # echo on > $(find /sys -name control | grep \/5601) # rwmem 0x56000024 0x56000024 = 0x00010200 # SGX540 CORE_REVISION # echo auto > $(find /sys -name control | grep \/5601) # rwmem 0x56000024 And when idled, it will produce "Bus error" as expected. Cc: Adam Ford <aford173@gmail.com> Cc: Filip Matijević <filip.matijevic.pz@gmail.com> Cc: "H. Nikolaus Schaller" <hns@goldelico.com> Cc: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com> Cc: moaz korena <moaz@korena.xyz> Cc: Merlijn Wajer <merlijn@wizzup.org> Cc: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com> Cc: Philipp Rossak <embed3d@gmail.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2/omap_hwmod_44xx_data.c')
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_44xx_data.c53
1 files changed, 0 insertions, 53 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index a6f2a10cdc3e..559b205020c7 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -1086,41 +1086,6 @@ static struct omap_hwmod omap44xx_gpmc_hwmod = {
};
/*
- * 'gpu' class
- * 2d/3d graphics accelerator
- */
-
-static struct omap_hwmod_class_sysconfig omap44xx_gpu_sysc = {
- .rev_offs = 0x1fc00,
- .sysc_offs = 0x1fc10,
- .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE),
- .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
- SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
- MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
- .sysc_fields = &omap_hwmod_sysc_type2,
-};
-
-static struct omap_hwmod_class omap44xx_gpu_hwmod_class = {
- .name = "gpu",
- .sysc = &omap44xx_gpu_sysc,
-};
-
-/* gpu */
-static struct omap_hwmod omap44xx_gpu_hwmod = {
- .name = "gpu",
- .class = &omap44xx_gpu_hwmod_class,
- .clkdm_name = "l3_gfx_clkdm",
- .main_clk = "sgx_clk_mux",
- .prcm = {
- .omap4 = {
- .clkctrl_offs = OMAP4_CM_GFX_GFX_CLKCTRL_OFFSET,
- .context_offs = OMAP4_RM_GFX_GFX_CONTEXT_OFFSET,
- .modulemode = MODULEMODE_SWCTRL,
- },
- },
-};
-
-/*
* 'hdq1w' class
* hdq / 1-wire serial interface controller
*/
@@ -2596,14 +2561,6 @@ static struct omap_hwmod_ocp_if omap44xx_fdif__l3_main_2 = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-/* gpu -> l3_main_2 */
-static struct omap_hwmod_ocp_if omap44xx_gpu__l3_main_2 = {
- .master = &omap44xx_gpu_hwmod,
- .slave = &omap44xx_l3_main_2_hwmod,
- .clk = "l3_div_ck",
- .user = OCP_USER_MPU | OCP_USER_SDMA,
-};
-
/* hsi -> l3_main_2 */
static struct omap_hwmod_ocp_if omap44xx_hsi__l3_main_2 = {
.master = &omap44xx_hsi_hwmod,
@@ -3028,14 +2985,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__gpmc = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-/* l3_main_2 -> gpu */
-static struct omap_hwmod_ocp_if omap44xx_l3_main_2__gpu = {
- .master = &omap44xx_l3_main_2_hwmod,
- .slave = &omap44xx_gpu_hwmod,
- .clk = "l3_div_ck",
- .user = OCP_USER_MPU | OCP_USER_SDMA,
-};
-
/* l4_per -> hdq1w */
static struct omap_hwmod_ocp_if omap44xx_l4_per__hdq1w = {
.master = &omap44xx_l4_per_hwmod,
@@ -3450,7 +3399,6 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
&omap44xx_debugss__l3_main_2,
&omap44xx_dma_system__l3_main_2,
&omap44xx_fdif__l3_main_2,
- &omap44xx_gpu__l3_main_2,
&omap44xx_hsi__l3_main_2,
&omap44xx_ipu__l3_main_2,
&omap44xx_iss__l3_main_2,
@@ -3503,7 +3451,6 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
&omap44xx_l4_per__elm,
&omap44xx_l4_cfg__fdif,
&omap44xx_l3_main_2__gpmc,
- &omap44xx_l3_main_2__gpu,
&omap44xx_l4_per__hdq1w,
&omap44xx_l4_cfg__hsi,
&omap44xx_l3_main_2__ipu,