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authorThara Gopinath <thara@ti.com>2009-12-08 16:33:15 -0700
committerpaul <paul@twilight.(none)>2009-12-11 17:00:42 -0700
commit3863c74b512c1afd3ce6b2f81d8dea9f1d860968 (patch)
tree1d7d15664c0ae3a71be7949e9c52ca2f79a73811 /arch/arm/mach-omap2/powerdomain.c
parent18862cbe47e37beba98f22c088fbe6fe029df889 (diff)
OMAP3: PM: Fix for MPU power domain MEM BANK position
MPU power domain bank 0 bits are displayed in position of bank 1 in PWRSTS and PREPWRSTS registers. So read them from correct position Signed-off-by: Thara Gopinath <thara@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/mach-omap2/powerdomain.c')
-rw-r--r--arch/arm/mach-omap2/powerdomain.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c
index 47d576883d5c..26b3f3ee82a3 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -983,6 +983,9 @@ int pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank)
if (pwrdm->banks < (bank + 1))
return -EEXIST;
+ if (pwrdm->flags & PWRDM_HAS_MPU_QUIRK)
+ bank = 1;
+
/*
* The register bit names below may not correspond to the
* actual names of the bits in each powerdomain's register,
@@ -1030,6 +1033,9 @@ int pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank)
if (pwrdm->banks < (bank + 1))
return -EEXIST;
+ if (pwrdm->flags & PWRDM_HAS_MPU_QUIRK)
+ bank = 1;
+
/*
* The register bit names below may not correspond to the
* actual names of the bits in each powerdomain's register,