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authorArnd Bergmann <arnd@arndb.de>2017-08-16 22:34:15 +0200
committerArnd Bergmann <arnd@arndb.de>2017-08-16 22:34:15 +0200
commita968bc52fe8afb54ea07c5bae1d7ed236bd7733f (patch)
tree76a4e1aa6938987b0991cb5f0835fd18e49f1257 /arch/arm/mach-omap2
parent6a1aa09b1576e92ce2b1fa00c0bedde15c74de37 (diff)
parent3af6ccc3d1b167c14fd195341092073820361de1 (diff)
Merge tag 'omap-for-v4.14/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
Pull "soc changes for omaps for v4.14" from Tony Lindgren: SoC updates for omaps for v4.14. Most of the chages are to add support for new dra762 SoC. The other changes are are for legacy DMA code removal, and MMC quirk and iodelay config for dra7. * tag 'omap-for-v4.14/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP: dra7: powerdomain data: Register SoC specific powerdomains ARM: dra762: Enable SMP for dra762 ARM: dra7: hwmod: Register dra76x specific hwmod ARM: dra762: Add support for device identification ARM: OMAP2+: board-generic: add support for dra762 family ARM: OMAP2+: Select PINCTRL_TI_IODELAY for SOC_DRA7XX ARM: OMAP2+: Add pdata-quirks for MMC/SD on DRA74x EVM ARM: OMAP2+: Remove unused legacy code for DMA
Diffstat (limited to 'arch/arm/mach-omap2')
-rw-r--r--arch/arm/mach-omap2/Kconfig1
-rw-r--r--arch/arm/mach-omap2/board-generic.c1
-rw-r--r--arch/arm/mach-omap2/dma.c148
-rw-r--r--arch/arm/mach-omap2/id.c9
-rw-r--r--arch/arm/mach-omap2/omap-smp.c4
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_7xx_data.c11
-rw-r--r--arch/arm/mach-omap2/pdata-quirks.c31
-rw-r--r--arch/arm/mach-omap2/powerdomains7xx_data.c33
-rw-r--r--arch/arm/mach-omap2/soc.h5
9 files changed, 95 insertions, 148 deletions
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 0465338183c7..e31a5a22e171 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -87,6 +87,7 @@ config SOC_DRA7XX
select OMAP_INTERCONNECT_BARRIER
select PM_OPP if PM
select ZONE_DMA if ARM_LPAE
+ select PINCTRL_TI_IODELAY if OF && PINCTRL
config ARCH_OMAP2PLUS
bool
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index b1e661bb5521..d4ae95dd6ee3 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -312,6 +312,7 @@ MACHINE_END
#ifdef CONFIG_SOC_DRA7XX
static const char *const dra74x_boards_compat[] __initconst = {
+ "ti,dra762",
"ti,am5728",
"ti,am5726",
"ti,dra742",
diff --git a/arch/arm/mach-omap2/dma.c b/arch/arm/mach-omap2/dma.c
index 0b77a0176018..694ce0939d50 100644
--- a/arch/arm/mach-omap2/dma.c
+++ b/arch/arm/mach-omap2/dma.c
@@ -204,61 +204,6 @@ static unsigned configure_dma_errata(void)
return errata;
}
-static const struct dma_slave_map omap24xx_sdma_map[] = {
- { "omap-gpmc", "rxtx", SDMA_FILTER_PARAM(4) },
- { "omap-aes", "tx", SDMA_FILTER_PARAM(9) },
- { "omap-aes", "rx", SDMA_FILTER_PARAM(10) },
- { "omap-sham", "rx", SDMA_FILTER_PARAM(13) },
- { "omap2_mcspi.2", "tx0", SDMA_FILTER_PARAM(15) },
- { "omap2_mcspi.2", "rx0", SDMA_FILTER_PARAM(16) },
- { "omap-mcbsp.3", "tx", SDMA_FILTER_PARAM(17) },
- { "omap-mcbsp.3", "rx", SDMA_FILTER_PARAM(18) },
- { "omap-mcbsp.4", "tx", SDMA_FILTER_PARAM(19) },
- { "omap-mcbsp.4", "rx", SDMA_FILTER_PARAM(20) },
- { "omap-mcbsp.5", "tx", SDMA_FILTER_PARAM(21) },
- { "omap-mcbsp.5", "rx", SDMA_FILTER_PARAM(22) },
- { "omap2_mcspi.2", "tx1", SDMA_FILTER_PARAM(23) },
- { "omap2_mcspi.2", "rx1", SDMA_FILTER_PARAM(24) },
- { "omap_i2c.1", "tx", SDMA_FILTER_PARAM(27) },
- { "omap_i2c.1", "rx", SDMA_FILTER_PARAM(28) },
- { "omap_i2c.2", "tx", SDMA_FILTER_PARAM(29) },
- { "omap_i2c.2", "rx", SDMA_FILTER_PARAM(30) },
- { "omap-mcbsp.1", "tx", SDMA_FILTER_PARAM(31) },
- { "omap-mcbsp.1", "rx", SDMA_FILTER_PARAM(32) },
- { "omap-mcbsp.2", "tx", SDMA_FILTER_PARAM(33) },
- { "omap-mcbsp.2", "rx", SDMA_FILTER_PARAM(34) },
- { "omap2_mcspi.0", "tx0", SDMA_FILTER_PARAM(35) },
- { "omap2_mcspi.0", "rx0", SDMA_FILTER_PARAM(36) },
- { "omap2_mcspi.0", "tx1", SDMA_FILTER_PARAM(37) },
- { "omap2_mcspi.0", "rx1", SDMA_FILTER_PARAM(38) },
- { "omap2_mcspi.0", "tx2", SDMA_FILTER_PARAM(39) },
- { "omap2_mcspi.0", "rx2", SDMA_FILTER_PARAM(40) },
- { "omap2_mcspi.0", "tx3", SDMA_FILTER_PARAM(41) },
- { "omap2_mcspi.0", "rx3", SDMA_FILTER_PARAM(42) },
- { "omap2_mcspi.1", "tx0", SDMA_FILTER_PARAM(43) },
- { "omap2_mcspi.1", "rx0", SDMA_FILTER_PARAM(44) },
- { "omap2_mcspi.1", "tx1", SDMA_FILTER_PARAM(45) },
- { "omap2_mcspi.1", "rx1", SDMA_FILTER_PARAM(46) },
- { "omap_hsmmc.1", "tx", SDMA_FILTER_PARAM(47) },
- { "omap_hsmmc.1", "rx", SDMA_FILTER_PARAM(48) },
- { "omap_uart.0", "tx", SDMA_FILTER_PARAM(49) },
- { "omap_uart.0", "rx", SDMA_FILTER_PARAM(50) },
- { "omap_uart.1", "tx", SDMA_FILTER_PARAM(51) },
- { "omap_uart.1", "rx", SDMA_FILTER_PARAM(52) },
- { "omap_uart.2", "tx", SDMA_FILTER_PARAM(53) },
- { "omap_uart.2", "rx", SDMA_FILTER_PARAM(54) },
- { "omap_hsmmc.0", "tx", SDMA_FILTER_PARAM(61) },
- { "omap_hsmmc.0", "rx", SDMA_FILTER_PARAM(62) },
-
- /* external DMA requests when tusb6010 is used */
- { "musb-tusb", "dmareq0", SDMA_FILTER_PARAM(2) },
- { "musb-tusb", "dmareq1", SDMA_FILTER_PARAM(3) },
- { "musb-tusb", "dmareq2", SDMA_FILTER_PARAM(14) }, /* OMAP2420 only */
- { "musb-tusb", "dmareq3", SDMA_FILTER_PARAM(15) }, /* OMAP2420 only */
- { "musb-tusb", "dmareq4", SDMA_FILTER_PARAM(16) }, /* OMAP2420 only */
- { "musb-tusb", "dmareq5", SDMA_FILTER_PARAM(64) }, /* OMAP2420 only */
-};
-
static const struct dma_slave_map omap24xx_sdma_dt_map[] = {
/* external DMA requests when tusb6010 is used */
{ "musb-hdrc.1.auto", "dmareq0", SDMA_FILTER_PARAM(2) },
@@ -269,61 +214,6 @@ static const struct dma_slave_map omap24xx_sdma_dt_map[] = {
{ "musb-hdrc.1.auto", "dmareq5", SDMA_FILTER_PARAM(64) }, /* OMAP2420 only */
};
-static const struct dma_slave_map omap3xxx_sdma_map[] = {
- { "omap-gpmc", "rxtx", SDMA_FILTER_PARAM(4) },
- { "omap2_mcspi.2", "tx0", SDMA_FILTER_PARAM(15) },
- { "omap2_mcspi.2", "rx0", SDMA_FILTER_PARAM(16) },
- { "omap-mcbsp.3", "tx", SDMA_FILTER_PARAM(17) },
- { "omap-mcbsp.3", "rx", SDMA_FILTER_PARAM(18) },
- { "omap-mcbsp.4", "tx", SDMA_FILTER_PARAM(19) },
- { "omap-mcbsp.4", "rx", SDMA_FILTER_PARAM(20) },
- { "omap-mcbsp.5", "tx", SDMA_FILTER_PARAM(21) },
- { "omap-mcbsp.5", "rx", SDMA_FILTER_PARAM(22) },
- { "omap2_mcspi.2", "tx1", SDMA_FILTER_PARAM(23) },
- { "omap2_mcspi.2", "rx1", SDMA_FILTER_PARAM(24) },
- { "omap_i2c.3", "tx", SDMA_FILTER_PARAM(25) },
- { "omap_i2c.3", "rx", SDMA_FILTER_PARAM(26) },
- { "omap_i2c.1", "tx", SDMA_FILTER_PARAM(27) },
- { "omap_i2c.1", "rx", SDMA_FILTER_PARAM(28) },
- { "omap_i2c.2", "tx", SDMA_FILTER_PARAM(29) },
- { "omap_i2c.2", "rx", SDMA_FILTER_PARAM(30) },
- { "omap-mcbsp.1", "tx", SDMA_FILTER_PARAM(31) },
- { "omap-mcbsp.1", "rx", SDMA_FILTER_PARAM(32) },
- { "omap-mcbsp.2", "tx", SDMA_FILTER_PARAM(33) },
- { "omap-mcbsp.2", "rx", SDMA_FILTER_PARAM(34) },
- { "omap2_mcspi.0", "tx0", SDMA_FILTER_PARAM(35) },
- { "omap2_mcspi.0", "rx0", SDMA_FILTER_PARAM(36) },
- { "omap2_mcspi.0", "tx1", SDMA_FILTER_PARAM(37) },
- { "omap2_mcspi.0", "rx1", SDMA_FILTER_PARAM(38) },
- { "omap2_mcspi.0", "tx2", SDMA_FILTER_PARAM(39) },
- { "omap2_mcspi.0", "rx2", SDMA_FILTER_PARAM(40) },
- { "omap2_mcspi.0", "tx3", SDMA_FILTER_PARAM(41) },
- { "omap2_mcspi.0", "rx3", SDMA_FILTER_PARAM(42) },
- { "omap2_mcspi.1", "tx0", SDMA_FILTER_PARAM(43) },
- { "omap2_mcspi.1", "rx0", SDMA_FILTER_PARAM(44) },
- { "omap2_mcspi.1", "tx1", SDMA_FILTER_PARAM(45) },
- { "omap2_mcspi.1", "rx1", SDMA_FILTER_PARAM(46) },
- { "omap_hsmmc.1", "tx", SDMA_FILTER_PARAM(47) },
- { "omap_hsmmc.1", "rx", SDMA_FILTER_PARAM(48) },
- { "omap_uart.0", "tx", SDMA_FILTER_PARAM(49) },
- { "omap_uart.0", "rx", SDMA_FILTER_PARAM(50) },
- { "omap_uart.1", "tx", SDMA_FILTER_PARAM(51) },
- { "omap_uart.1", "rx", SDMA_FILTER_PARAM(52) },
- { "omap_uart.2", "tx", SDMA_FILTER_PARAM(53) },
- { "omap_uart.2", "rx", SDMA_FILTER_PARAM(54) },
- { "omap_hsmmc.0", "tx", SDMA_FILTER_PARAM(61) },
- { "omap_hsmmc.0", "rx", SDMA_FILTER_PARAM(62) },
- { "omap-aes", "tx", SDMA_FILTER_PARAM(65) },
- { "omap-aes", "rx", SDMA_FILTER_PARAM(66) },
- { "omap-sham", "rx", SDMA_FILTER_PARAM(69) },
- { "omap2_mcspi.3", "tx0", SDMA_FILTER_PARAM(70) },
- { "omap2_mcspi.3", "rx0", SDMA_FILTER_PARAM(71) },
- { "omap_hsmmc.2", "tx", SDMA_FILTER_PARAM(77) },
- { "omap_hsmmc.2", "rx", SDMA_FILTER_PARAM(78) },
- { "omap_uart.3", "tx", SDMA_FILTER_PARAM(81) },
- { "omap_uart.3", "rx", SDMA_FILTER_PARAM(82) },
-};
-
static struct omap_system_dma_plat_info dma_plat_info __initdata = {
.reg_map = reg_map,
.channel_stride = 0x60,
@@ -352,24 +242,10 @@ static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused)
p.dma_attr = (struct omap_dma_dev_attr *)oh->dev_attr;
p.errata = configure_dma_errata();
- if (!of_have_populated_dt()) {
- if (soc_is_omap24xx()) {
- p.slave_map = omap24xx_sdma_map;
- p.slavecnt = ARRAY_SIZE(omap24xx_sdma_map);
- } else if (soc_is_omap34xx() || soc_is_omap3630()) {
- p.slave_map = omap3xxx_sdma_map;
- p.slavecnt = ARRAY_SIZE(omap3xxx_sdma_map);
- } else {
- pr_err("%s: The legacy DMA map is not provided!\n",
- __func__);
- return -ENODEV;
- }
- } else {
- if (soc_is_omap24xx()) {
- /* DMA slave map for drivers not yet converted to DT */
- p.slave_map = omap24xx_sdma_dt_map;
- p.slavecnt = ARRAY_SIZE(omap24xx_sdma_dt_map);
- }
+ if (soc_is_omap24xx()) {
+ /* DMA slave map for drivers not yet converted to DT */
+ p.slave_map = omap24xx_sdma_dt_map;
+ p.slavecnt = ARRAY_SIZE(omap24xx_sdma_dt_map);
}
pdev = omap_device_build(name, 0, oh, &p, sizeof(p));
@@ -413,21 +289,7 @@ static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused)
static int __init omap2_system_dma_init(void)
{
- struct platform_device *pdev;
- int res;
-
- res = omap_hwmod_for_each_by_class("dma",
+ return omap_hwmod_for_each_by_class("dma",
omap2_system_dma_init_dev, NULL);
- if (res)
- return res;
-
- if (of_have_populated_dt())
- return res;
-
- pdev = platform_device_register_full(&omap_dma_dev_info);
- if (IS_ERR(pdev))
- return PTR_ERR(pdev);
-
- return res;
}
omap_arch_initcall(omap2_system_dma_init);
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index e2274a162b74..16cb1c195fd8 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -663,6 +663,15 @@ void __init dra7xxx_check_revision(void)
hawkeye = (idcode >> 12) & 0xffff;
rev = (idcode >> 28) & 0xff;
switch (hawkeye) {
+ case 0xbb50:
+ switch (rev) {
+ case 0:
+ default:
+ omap_revision = DRA762_REV_ES1_0;
+ break;
+ }
+ break;
+
case 0xb990:
switch (rev) {
case 0:
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c
index 33e4953c61a8..69df3620eca5 100644
--- a/arch/arm/mach-omap2/omap-smp.c
+++ b/arch/arm/mach-omap2/omap-smp.c
@@ -342,7 +342,7 @@ static void __init omap4_smp_prepare_cpus(unsigned int max_cpus)
c = &omap443x_cfg;
else if (soc_is_omap446x())
c = &omap446x_cfg;
- else if (soc_is_dra74x() || soc_is_omap54xx())
+ else if (soc_is_dra74x() || soc_is_omap54xx() || soc_is_dra76x())
c = &omap5_cfg;
if (!c) {
@@ -355,7 +355,7 @@ static void __init omap4_smp_prepare_cpus(unsigned int max_cpus)
cfg.startup_addr = c->startup_addr;
cfg.wakeupgen_base = omap_get_wakeupgen_base();
- if (soc_is_dra74x() || soc_is_omap54xx()) {
+ if (soc_is_dra74x() || soc_is_omap54xx() || soc_is_dra76x()) {
if ((__boot_cpu_mode & MODE_MASK) == HYP_MODE)
cfg.startup_addr = omap5_secondary_hyp_startup;
omap5_erratum_workaround_801819();
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index b3abb8d8b2f6..f040244c57e7 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -4070,6 +4070,11 @@ static struct omap_hwmod_ocp_if *dra7xx_gp_hwmod_ocp_ifs[] __initdata = {
};
/* SoC variant specific hwmod links */
+static struct omap_hwmod_ocp_if *dra76x_hwmod_ocp_ifs[] __initdata = {
+ &dra7xx_l4_per3__usb_otg_ss4,
+ NULL,
+};
+
static struct omap_hwmod_ocp_if *dra74x_hwmod_ocp_ifs[] __initdata = {
&dra7xx_l4_per3__usb_otg_ss4,
NULL,
@@ -4095,12 +4100,14 @@ int __init dra7xx_hwmod_init(void)
ret = omap_hwmod_register_links(dra74x_hwmod_ocp_ifs);
else if (!ret && soc_is_dra72x())
ret = omap_hwmod_register_links(dra72x_hwmod_ocp_ifs);
+ else if (!ret && soc_is_dra76x())
+ ret = omap_hwmod_register_links(dra76x_hwmod_ocp_ifs);
if (!ret && omap_type() == OMAP2_DEVICE_TYPE_GP)
ret = omap_hwmod_register_links(dra7xx_gp_hwmod_ocp_ifs);
- /* now for the IPs *NOT* in dra71 */
- if (!ret && !of_machine_is_compatible("ti,dra718"))
+ /* now for the IPs available only in dra74 and dra72 */
+ if (!ret && !of_machine_is_compatible("ti,dra718") && !soc_is_dra76x())
ret = omap_hwmod_register_links(dra74x_dra72x_hwmod_ocp_ifs);
return ret;
diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c
index 9700a8ef0f16..6b433fce65a5 100644
--- a/arch/arm/mach-omap2/pdata-quirks.c
+++ b/arch/arm/mach-omap2/pdata-quirks.c
@@ -434,6 +434,26 @@ static void __init omap5_uevm_legacy_init(void)
}
#endif
+#ifdef CONFIG_SOC_DRA7XX
+static struct omap_hsmmc_platform_data dra7_hsmmc_data_mmc1;
+static struct omap_hsmmc_platform_data dra7_hsmmc_data_mmc2;
+static struct omap_hsmmc_platform_data dra7_hsmmc_data_mmc3;
+
+static void __init dra7x_evm_mmc_quirk(void)
+{
+ if (omap_rev() == DRA752_REV_ES1_1 || omap_rev() == DRA752_REV_ES1_0) {
+ dra7_hsmmc_data_mmc1.version = "rev11";
+ dra7_hsmmc_data_mmc1.max_freq = 96000000;
+
+ dra7_hsmmc_data_mmc2.version = "rev11";
+ dra7_hsmmc_data_mmc2.max_freq = 48000000;
+
+ dra7_hsmmc_data_mmc3.version = "rev11";
+ dra7_hsmmc_data_mmc3.max_freq = 48000000;
+ }
+}
+#endif
+
static struct pcs_pdata pcs_pdata;
void omap_pcs_legacy_init(int irq, void (*rearm)(void))
@@ -561,6 +581,14 @@ static struct of_dev_auxdata omap_auxdata_lookup[] __initdata = {
OF_DEV_AUXDATA("ti,omap4-iommu", 0x55082000, "55082000.mmu",
&omap4_iommu_pdata),
#endif
+#ifdef CONFIG_SOC_DRA7XX
+ OF_DEV_AUXDATA("ti,dra7-hsmmc", 0x4809c000, "4809c000.mmc",
+ &dra7_hsmmc_data_mmc1),
+ OF_DEV_AUXDATA("ti,dra7-hsmmc", 0x480b4000, "480b4000.mmc",
+ &dra7_hsmmc_data_mmc2),
+ OF_DEV_AUXDATA("ti,dra7-hsmmc", 0x480ad000, "480ad000.mmc",
+ &dra7_hsmmc_data_mmc3),
+#endif
/* Common auxdata */
OF_DEV_AUXDATA("pinctrl-single", 0, NULL, &pcs_pdata),
{ /* sentinel */ },
@@ -590,6 +618,9 @@ static struct pdata_init pdata_quirks[] __initdata = {
#ifdef CONFIG_SOC_OMAP5
{ "ti,omap5-uevm", omap5_uevm_legacy_init, },
#endif
+#ifdef CONFIG_SOC_DRA7XX
+ { "ti,dra7-evm", dra7x_evm_mmc_quirk, },
+#endif
{ /* sentinel */ },
};
diff --git a/arch/arm/mach-omap2/powerdomains7xx_data.c b/arch/arm/mach-omap2/powerdomains7xx_data.c
index eb350a673133..f50963916a21 100644
--- a/arch/arm/mach-omap2/powerdomains7xx_data.c
+++ b/arch/arm/mach-omap2/powerdomains7xx_data.c
@@ -29,6 +29,7 @@
#include "prcm44xx.h"
#include "prm7xx.h"
#include "prcm_mpu7xx.h"
+#include "soc.h"
/* iva_7xx_pwrdm: IVA-HD power domain */
static struct powerdomain iva_7xx_pwrdm = {
@@ -63,6 +64,14 @@ static struct powerdomain custefuse_7xx_pwrdm = {
.flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
};
+/* custefuse_aon_7xx_pwrdm: Customer efuse controller power domain */
+static struct powerdomain custefuse_aon_7xx_pwrdm = {
+ .name = "custefuse_pwrdm",
+ .prcm_offs = DRA7XX_PRM_CUSTEFUSE_INST,
+ .prcm_partition = DRA7XX_PRM_PARTITION,
+ .pwrsts = PWRSTS_ON,
+};
+
/* ipu_7xx_pwrdm: Audio back end power domain */
static struct powerdomain ipu_7xx_pwrdm = {
.name = "ipu_pwrdm",
@@ -350,7 +359,6 @@ static struct powerdomain eve1_7xx_pwrdm = {
static struct powerdomain *powerdomains_dra7xx[] __initdata = {
&iva_7xx_pwrdm,
&rtc_7xx_pwrdm,
- &custefuse_7xx_pwrdm,
&ipu_7xx_pwrdm,
&dss_7xx_pwrdm,
&l4per_7xx_pwrdm,
@@ -374,9 +382,32 @@ static struct powerdomain *powerdomains_dra7xx[] __initdata = {
NULL
};
+static struct powerdomain *powerdomains_dra76x[] __initdata = {
+ &custefuse_aon_7xx_pwrdm,
+ NULL
+};
+
+static struct powerdomain *powerdomains_dra74x[] __initdata = {
+ &custefuse_7xx_pwrdm,
+ NULL
+};
+
+static struct powerdomain *powerdomains_dra72x[] __initdata = {
+ &custefuse_aon_7xx_pwrdm,
+ NULL
+};
+
void __init dra7xx_powerdomains_init(void)
{
pwrdm_register_platform_funcs(&omap4_pwrdm_operations);
pwrdm_register_pwrdms(powerdomains_dra7xx);
+
+ if (soc_is_dra76x())
+ pwrdm_register_pwrdms(powerdomains_dra76x);
+ else if (soc_is_dra74x())
+ pwrdm_register_pwrdms(powerdomains_dra74x);
+ else if (soc_is_dra72x())
+ pwrdm_register_pwrdms(powerdomains_dra72x);
+
pwrdm_complete_init();
}
diff --git a/arch/arm/mach-omap2/soc.h b/arch/arm/mach-omap2/soc.h
index 2aa01c270898..754cd0fc0e7b 100644
--- a/arch/arm/mach-omap2/soc.h
+++ b/arch/arm/mach-omap2/soc.h
@@ -167,6 +167,7 @@ IS_TI_SUBCLASS(816x, 0x816)
IS_TI_SUBCLASS(814x, 0x814)
IS_AM_SUBCLASS(335x, 0x335)
IS_AM_SUBCLASS(437x, 0x437)
+IS_DRA_SUBCLASS(76x, 0x76)
IS_DRA_SUBCLASS(75x, 0x75)
IS_DRA_SUBCLASS(72x, 0x72)
@@ -185,6 +186,7 @@ IS_DRA_SUBCLASS(72x, 0x72)
#define soc_is_omap54xx() 0
#define soc_is_omap543x() 0
#define soc_is_dra7xx() 0
+#define soc_is_dra76x() 0
#define soc_is_dra74x() 0
#define soc_is_dra72x() 0
@@ -314,9 +316,11 @@ IS_OMAP_TYPE(3430, 0x3430)
#if defined(CONFIG_SOC_DRA7XX)
#undef soc_is_dra7xx
+#undef soc_is_dra76x
#undef soc_is_dra74x
#undef soc_is_dra72x
#define soc_is_dra7xx() is_dra7xx()
+#define soc_is_dra76x() is_dra76x()
#define soc_is_dra74x() is_dra75x()
#define soc_is_dra72x() is_dra72x()
#endif
@@ -386,6 +390,7 @@ IS_OMAP_TYPE(3430, 0x3430)
#define OMAP5432_REV_ES2_0 (OMAP54XX_CLASS | (0x32 << 16) | (0x20 << 8))
#define DRA7XX_CLASS 0x07000000
+#define DRA762_REV_ES1_0 (DRA7XX_CLASS | (0x62 << 16) | (0x10 << 8))
#define DRA752_REV_ES1_0 (DRA7XX_CLASS | (0x52 << 16) | (0x10 << 8))
#define DRA752_REV_ES1_1 (DRA7XX_CLASS | (0x52 << 16) | (0x11 << 8))
#define DRA752_REV_ES2_0 (DRA7XX_CLASS | (0x52 << 16) | (0x20 << 8))