summaryrefslogtreecommitdiff
path: root/arch/arm/mach-pxa/include/mach/pxa2xx-regs.h
diff options
context:
space:
mode:
authorPhilipp Zabel <philipp.zabel@gmail.com>2008-06-29 16:53:34 +0200
committerEric Miao <eric.miao@marvell.com>2008-12-02 14:43:47 +0800
commita10c287d393bdd32127d59f3ec8fd7bb80e2fa05 (patch)
tree00b75d4d4839eb4eaa56cc301e84dd207420ed54 /arch/arm/mach-pxa/include/mach/pxa2xx-regs.h
parent65587f7d154ac58f4ff100c240640c71abec41dd (diff)
[ARM] pxa: cpufreq-pxa2xx: sdram_rows detection support
This patch implements Eric Miao's idea to detect the correct value of sdram_rows by inspecting the MDCNFG register settings. It is only tested on two pxa27x devices with 64MB RAM (magician and hx4700) so far. Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
Diffstat (limited to 'arch/arm/mach-pxa/include/mach/pxa2xx-regs.h')
-rw-r--r--arch/arm/mach-pxa/include/mach/pxa2xx-regs.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/mach-pxa/include/mach/pxa2xx-regs.h b/arch/arm/mach-pxa/include/mach/pxa2xx-regs.h
index 2b71d87c898f..77102d695cc7 100644
--- a/arch/arm/mach-pxa/include/mach/pxa2xx-regs.h
+++ b/arch/arm/mach-pxa/include/mach/pxa2xx-regs.h
@@ -49,6 +49,11 @@
#define MECR_NOS (1 << 0) /* Number Of Sockets: 0 -> 1 sock, 1 -> 2 sock */
#define MECR_CIT (1 << 1) /* Card Is There: 0 -> no card, 1 -> card inserted */
+#define MDCNFG_DE0 (1 << 0) /* SDRAM Bank 0 Enable */
+#define MDCNFG_DE1 (1 << 1) /* SDRAM Bank 1 Enable */
+#define MDCNFG_DE2 (1 << 16) /* SDRAM Bank 2 Enable */
+#define MDCNFG_DE3 (1 << 17) /* SDRAM Bank 3 Enable */
+
#define MDREFR_K0DB4 (1 << 29) /* SDCLK0 Divide by 4 Control/Status */
#define MDREFR_K2FREE (1 << 25) /* SDRAM Free-Running Control */
#define MDREFR_K1FREE (1 << 24) /* SDRAM Free-Running Control */