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authorAndrew Ruder <andrew.ruder@elecsyscorp.com>2014-06-05 14:10:56 -0500
committerHaojian Zhuang <haojian.zhuang@linaro.org>2014-07-04 20:30:42 +0800
commit43e2be14c111bb8d72fdd087e94ad286336056b0 (patch)
tree92c29015d326a144fd7597910be1b07472334721 /arch/arm/mach-pxa/sleep.S
parent7171511eaec5bf23fb06078f59784a3a0626b38f (diff)
ARM: pxa: correct errata number for PXA270
Comment incorrectly cites errata 39 E39. SDIO: SDIO Devices Not Working at 19.5 Mbps Should be errata 38 E38. MEMC: Memory Controller hangs when entering Self Refresh Mode. Signed-off-by: Andrew Ruder <andrew.ruder@elecsyscorp.com> Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Diffstat (limited to 'arch/arm/mach-pxa/sleep.S')
-rw-r--r--arch/arm/mach-pxa/sleep.S2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-pxa/sleep.S b/arch/arm/mach-pxa/sleep.S
index 1e544be9905d..6c5b3ffd2cd3 100644
--- a/arch/arm/mach-pxa/sleep.S
+++ b/arch/arm/mach-pxa/sleep.S
@@ -157,7 +157,7 @@ pxa_cpu_do_suspend:
@ Do not reorder...
@ Intel PXA270 Specification Update notes problems performing
@ external accesses after SDRAM is put in self-refresh mode
- @ (see Errata 39 ...hangs when entering self-refresh mode)
+ @ (see Errata 38 ...hangs when entering self-refresh mode)
@ force address lines low by reading at physical address 0
ldr r3, [r2]