summaryrefslogtreecommitdiff
path: root/arch/arm/mach-s3c24xx
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2017-09-10 20:35:46 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2017-09-10 20:35:46 -0700
commit7f1b9be13a7dbe8e51ea541bbcd6c47adae39c71 (patch)
tree5e6c7f58596e0b9ec89b5c2d2909d7ba6d662ce8 /arch/arm/mach-s3c24xx
parentd719518d9ce9132bad8a06e8029aeead328f66a3 (diff)
parente9e3969fe2d84e56b3ee5cd4f7e00f4516a885cb (diff)
Merge tag 'armsoc-platforms' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM/arm64 SoC platform updates from Olof Johansson: "This branch contains platform updates for 32- and 64-bit ARM, including defconfig updates to enable new options, drivers and platforms. There are also a few fixes and cleanups for some existing vendors. Some of the things worth highlighting here are: - Enabling new crypt drivers on arm64 defconfig - QCOM IPQ8074 clocks and pinctrl drivers on arm64 defconfig - Debug support enabled for Renesas r8a7743 - Various config updates for Renesas platforms (sound, USB, other drivers) - Platform support (including SMP) for TI dra762 - OMAP cleanups: Move to use generic 8250 debug_ll, removal of stale DMA code" * tag 'armsoc-platforms' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (109 commits) ARM: multi_v7_defconfig: make eSDHC driver built-in arm64: defconfig: enable rockchip graphics MAINTAINERS: Update Cavium ThunderX2 entry ARM: config: aspeed: Add I2C, VUART, LPC Snoop ARM: configs: aspeed: Update Aspeed G4 with VMSPLIT_2G ARM: s3c24xx: Fix NAND ECC mode for mini2440 board ARM: davinci_all_defconfig: enable tinydrm and ST7586 arm64: defconfig: Enable QCOM IPQ8074 clock and pinctrl ARM: defconfig: tegra: Enable ChipIdea UDC driver ARM: configs: Add Tegra I2S interfaces to multi_v7_defconfig ARM: tegra: Add Tegra I2S interfaces to defconfig ARM: tegra: Update default configuration for v4.13-rc1 MAINTAINERS: update ARM/ZTE entry soc: versatile: remove unnecessary static in realview_soc_probe() ARM: Convert to using %pOF instead of full_name ARM: hisi: Fix typo in comment ARM: multi_v7_defconfig: add CONFIG_BRCMSTB_THERMAL arm64: defconfig: add CONFIG_BRCMSTB_THERMAL arm64: defconfig: add recently added crypto drivers as modules arm64: defconfig: enable CONFIG_UNIPHIER_WATCHDOG ...
Diffstat (limited to 'arch/arm/mach-s3c24xx')
-rw-r--r--arch/arm/mach-s3c24xx/Kconfig2
-rw-r--r--arch/arm/mach-s3c24xx/common.c2
-rw-r--r--arch/arm/mach-s3c24xx/include/mach/regs-clock.h4
-rw-r--r--arch/arm/mach-s3c24xx/mach-mini2440.c2
-rw-r--r--arch/arm/mach-s3c24xx/mach-smdk2443.c8
-rw-r--r--arch/arm/mach-s3c24xx/sleep.S11
6 files changed, 11 insertions, 18 deletions
diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig
index f07da82ebfea..b198be7d32b6 100644
--- a/arch/arm/mach-s3c24xx/Kconfig
+++ b/arch/arm/mach-s3c24xx/Kconfig
@@ -229,7 +229,7 @@ config ARCH_H1940
config H1940BT
tristate "Control the state of H1940 bluetooth chip"
depends on ARCH_H1940
- select RFKILL
+ depends on RFKILL
help
This is a simple driver that is able to control
the state of built in bluetooth chip on h1940.
diff --git a/arch/arm/mach-s3c24xx/common.c b/arch/arm/mach-s3c24xx/common.c
index b59f4f4f256f..5b6b94ef41e2 100644
--- a/arch/arm/mach-s3c24xx/common.c
+++ b/arch/arm/mach-s3c24xx/common.c
@@ -173,7 +173,7 @@ static unsigned long s3c24xx_read_idcode_v5(void)
return gs;
#endif
-#if defined(CONFIG_CPU_S3C2412) || defined(CONFIG_CPU_S3C2413)
+#if defined(CONFIG_CPU_S3C2412)
return __raw_readl(S3C2412_GSTATUS1);
#else
return 1UL; /* don't look like an 2400 */
diff --git a/arch/arm/mach-s3c24xx/include/mach/regs-clock.h b/arch/arm/mach-s3c24xx/include/mach/regs-clock.h
index 3db6c10de023..ae4a3e0f3ba2 100644
--- a/arch/arm/mach-s3c24xx/include/mach/regs-clock.h
+++ b/arch/arm/mach-s3c24xx/include/mach/regs-clock.h
@@ -77,7 +77,7 @@
#endif /* CONFIG_CPU_S3C2440 or CONFIG_CPU_S3C2442 */
-#if defined(CONFIG_CPU_S3C2412) || defined(CONFIG_CPU_S3C2413)
+#if defined(CONFIG_CPU_S3C2412)
#define S3C2412_OSCSET S3C2410_CLKREG(0x18)
#define S3C2412_CLKSRC S3C2410_CLKREG(0x1C)
@@ -141,7 +141,7 @@
#define S3C2412_CLKSRC_UREFCLK_EXTCLK (1<<12)
#define S3C2412_CLKSRC_EREFCLK_EXTCLK (1<<14)
-#endif /* CONFIG_CPU_S3C2412 | CONFIG_CPU_S3C2413 */
+#endif /* CONFIG_CPU_S3C2412 */
#define S3C2416_CLKDIV2 S3C2410_CLKREG(0x28)
diff --git a/arch/arm/mach-s3c24xx/mach-mini2440.c b/arch/arm/mach-s3c24xx/mach-mini2440.c
index 15140d34f927..04c9f488c498 100644
--- a/arch/arm/mach-s3c24xx/mach-mini2440.c
+++ b/arch/arm/mach-s3c24xx/mach-mini2440.c
@@ -287,7 +287,7 @@ static struct s3c2410_platform_nand mini2440_nand_info __initdata = {
.nr_sets = ARRAY_SIZE(mini2440_nand_sets),
.sets = mini2440_nand_sets,
.ignore_unset_ecc = 1,
- .ecc_mode = NAND_ECC_SOFT,
+ .ecc_mode = NAND_ECC_HW,
};
/* DM9000AEP 10/100 ethernet controller */
diff --git a/arch/arm/mach-s3c24xx/mach-smdk2443.c b/arch/arm/mach-s3c24xx/mach-smdk2443.c
index 87fe5c5b8073..474cd81aa8ad 100644
--- a/arch/arm/mach-s3c24xx/mach-smdk2443.c
+++ b/arch/arm/mach-s3c24xx/mach-smdk2443.c
@@ -111,9 +111,6 @@ static struct platform_device *smdk2443_devices[] __initdata = {
&s3c_device_wdt,
&s3c_device_i2c0,
&s3c_device_hsmmc1,
-#ifdef CONFIG_SND_SOC_SMDK2443_WM9710
- &s3c_device_ac97,
-#endif
&s3c2443_device_dma,
};
@@ -133,11 +130,6 @@ static void __init smdk2443_init_time(void)
static void __init smdk2443_machine_init(void)
{
s3c_i2c0_set_platdata(NULL);
-
-#ifdef CONFIG_SND_SOC_SMDK2443_WM9710
- s3c24xx_ac97_setup_gpio(S3C24XX_AC97_GPE0);
-#endif
-
platform_add_devices(smdk2443_devices, ARRAY_SIZE(smdk2443_devices));
smdk_machine_init();
}
diff --git a/arch/arm/mach-s3c24xx/sleep.S b/arch/arm/mach-s3c24xx/sleep.S
index d833d616bd2e..b859268fa8da 100644
--- a/arch/arm/mach-s3c24xx/sleep.S
+++ b/arch/arm/mach-s3c24xx/sleep.S
@@ -33,10 +33,11 @@
#include <mach/regs-gpio.h>
#include <mach/regs-clock.h>
-/* CONFIG_DEBUG_RESUME is dangerous if your bootloader does not
+/*
+ * S3C24XX_DEBUG_RESUME is dangerous if your bootloader does not
* reset the UART configuration, only enable if you really need this!
-*/
-//#define CONFIG_DEBUG_RESUME
+ */
+//#define S3C24XX_DEBUG_RESUME
.text
@@ -71,13 +72,13 @@ ENTRY(s3c_cpu_resume)
str r12, [ r14, #0x54 ]
#endif
-#ifdef CONFIG_DEBUG_RESUME
+#ifdef S3C24XX_DEBUG_RESUME
mov r3, #'L'
strb r3, [ r2, #S3C2410_UTXH ]
1001:
ldrb r14, [ r3, #S3C2410_UTRSTAT ]
tst r14, #S3C2410_UTRSTAT_TXE
beq 1001b
-#endif /* CONFIG_DEBUG_RESUME */
+#endif /* S3C24XX_DEBUG_RESUME */
b cpu_resume