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| author | Arnd Bergmann <arnd@arndb.de> | 2016-07-14 15:08:15 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2016-07-14 15:08:15 +0200 |
| commit | a98405432e864e8483e1bdbf50a5668d6604283f (patch) | |
| tree | 48759795722859775160e5645e8e8df78120e195 /arch/arm/mach-s3c64xx | |
| parent | 933b11aeeda111c6af7a7350cbe0bc331b833d41 (diff) | |
| parent | 7b8e0188fa717cd9abc4fb52587445b421835c2a (diff) | |
Merge tag 'sti-soc-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti into next/soc
Merge "STi SoC changes for v4.8" from Patrice Chotard:
- Add a dummy L2 cache's write_sec callback as in non secure mode execution,
we can't get access to L2 cache secure registers
- Cosmetics change, in case of dump_stack, update the hardware name with a
more generic for the STi SoCs family
* tag 'sti-soc-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti:
ARM: sti: Implement dummy L2 cache's write_sec
ARM: STi: Update machine _namestr to be more generic.
Diffstat (limited to 'arch/arm/mach-s3c64xx')
0 files changed, 0 insertions, 0 deletions