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authorRussell King <rmk+kernel@armlinux.org.uk>2016-08-31 11:40:39 +0100
committerRussell King (Oracle) <rmk+kernel@armlinux.org.uk>2022-04-02 11:11:43 +0100
commit1d8f228a1698f1095a7c9ab52914be4e2fe3cb9d (patch)
treeb5a2cdaf7eae6943ff08264842a346762f57f3c0 /arch/arm/mach-sa1100/include
parentc959cf0112fdeeba817c2463f7fb1aab492e4f2c (diff)
ARM: sa1100/assabet: remove ASSABET_BSR* definitions
The assabet BSR register is treated as a GPIO register now, so the register address and bit definitions are redundant. Remove these definitions. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Diffstat (limited to 'arch/arm/mach-sa1100/include')
-rw-r--r--arch/arm/mach-sa1100/include/mach/assabet.h13
1 files changed, 0 insertions, 13 deletions
diff --git a/arch/arm/mach-sa1100/include/mach/assabet.h b/arch/arm/mach-sa1100/include/mach/assabet.h
index 380a7640facf..829fc1839d35 100644
--- a/arch/arm/mach-sa1100/include/mach/assabet.h
+++ b/arch/arm/mach-sa1100/include/mach/assabet.h
@@ -72,19 +72,6 @@ extern void assabet_uda1341_reset(int set);
#define ASSABET_BCR_set(x) ASSABET_BCR_frob((x), (x))
#define ASSABET_BCR_clear(x) ASSABET_BCR_frob((x), 0)
-#define ASSABET_BSR_BASE 0xf1000000
-#define ASSABET_BSR (*(volatile unsigned int*)(ASSABET_BSR_BASE))
-
-#define ASSABET_BSR_RS232_VALID (1 << 24)
-#define ASSABET_BSR_COM_DCD (1 << 25)
-#define ASSABET_BSR_COM_CTS (1 << 26)
-#define ASSABET_BSR_COM_DSR (1 << 27)
-#define ASSABET_BSR_RAD_CTS (1 << 28)
-#define ASSABET_BSR_RAD_DSR (1 << 29)
-#define ASSABET_BSR_RAD_DCD (1 << 30)
-#define ASSABET_BSR_RAD_RI (1 << 31)
-
-
/* GPIOs (bitmasks) for which the generic definition doesn't say much */
#define ASSABET_GPIO_RADIO_IRQ GPIO_GPIO (14) /* Radio interrupt request */
#define ASSABET_GPIO_PS_MODE_SYNC GPIO_GPIO (16) /* Power supply mode/sync */