diff options
| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2016-01-28 16:13:30 +0100 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2016-02-04 15:09:30 +0100 |
| commit | e24f317c859f2d904d1eb87cbb503c309e6dead7 (patch) | |
| tree | 49585c86296b760fb60d348998ac7f96fb4abd86 /arch/arm/mach-shmobile | |
| parent | 2e41e5fe88f99c03a77c4325870f160378b42268 (diff) | |
ARM: shmobile: Typo s/MIPDR/MPIDR/
The ARM Multiprocessor Affinity Register is called "MPIDR".
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/mach-shmobile')
| -rw-r--r-- | arch/arm/mach-shmobile/headsmp-scu.S | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-shmobile/headsmp-scu.S b/arch/arm/mach-shmobile/headsmp-scu.S index fa5248c52399..c0008a5aa4ca 100644 --- a/arch/arm/mach-shmobile/headsmp-scu.S +++ b/arch/arm/mach-shmobile/headsmp-scu.S @@ -27,7 +27,7 @@ */ ENTRY(shmobile_boot_scu) @ r0 = SCU base address - mrc p15, 0, r1, c0, c0, 5 @ read MIPDR + mrc p15, 0, r1, c0, c0, 5 @ read MPIDR and r1, r1, #3 @ mask out cpu ID lsl r1, r1, #3 @ we will shift by cpu_id * 8 bits ldr r2, [r0, #8] @ SCU Power Status Register |